|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc 7079 { 232, 3, 1, 4, 500, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #232 = ADDPv2i32
7082 { 235, 3, 1, 4, 500, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #235 = ADDPv4i16
7085 { 238, 3, 1, 4, 500, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #238 = ADDPv8i8
7124 { 277, 3, 1, 4, 709, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #277 = ADDv1i64
7125 { 278, 3, 1, 4, 488, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #278 = ADDv2i32
7127 { 280, 3, 1, 4, 488, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #280 = ADDv4i16
7130 { 283, 3, 1, 4, 488, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #283 = ADDv8i8
7186 { 339, 3, 1, 4, 490, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #339 = ANDv8i8
7267 { 420, 3, 1, 4, 490, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #420 = BICv8i8
7269 { 422, 3, 1, 4, 589, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #422 = BIFv8i8
7399 { 552, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #552 = CMEQv1i64
7401 { 554, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #554 = CMEQv2i32
7405 { 558, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #558 = CMEQv4i16
7411 { 564, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #564 = CMEQv8i8
7415 { 568, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #568 = CMGEv1i64
7417 { 570, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #570 = CMGEv2i32
7421 { 574, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #574 = CMGEv4i16
7427 { 580, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #580 = CMGEv8i8
7431 { 584, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #584 = CMGTv1i64
7433 { 586, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #586 = CMGTv2i32
7437 { 590, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #590 = CMGTv4i16
7443 { 596, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #596 = CMGTv8i8
7446 { 599, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #599 = CMHIv1i64
7447 { 600, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #600 = CMHIv2i32
7449 { 602, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #602 = CMHIv4i16
7452 { 605, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #605 = CMHIv8i8
7454 { 607, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #607 = CMHSv1i64
7455 { 608, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #608 = CMHSv2i32
7457 { 610, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #610 = CMHSv4i16
7460 { 613, 3, 1, 4, 501, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #613 = CMHSv8i8
7583 { 736, 3, 1, 4, 504, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #736 = CMTSTv1i64
7584 { 737, 3, 1, 4, 504, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #737 = CMTSTv2i32
7586 { 739, 3, 1, 4, 504, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #739 = CMTSTv4i16
7589 { 742, 3, 1, 4, 504, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #742 = CMTSTv8i8
7733 { 886, 3, 1, 4, 490, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #886 = EORv8i8
7746 { 899, 3, 1, 4, 239, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #899 = FABD64
7750 { 903, 3, 1, 4, 733, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #903 = FABDv2f32
7752 { 905, 3, 1, 4, 785, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #905 = FABDv4f16
7768 { 921, 3, 1, 4, 432, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #921 = FACGE64
7772 { 925, 3, 1, 4, 469, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #925 = FACGEv2f32
7774 { 927, 3, 1, 4, 788, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #927 = FACGEv4f16
7779 { 932, 3, 1, 4, 432, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #932 = FACGT64
7783 { 936, 3, 1, 4, 469, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #936 = FACGTv2f32
7785 { 938, 3, 1, 4, 788, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #938 = FACGTv4f16
7791 { 944, 3, 1, 4, 290, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #944 = FADDDrr
7796 { 949, 3, 1, 4, 241, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #949 = FADDPv2f32
7801 { 954, 3, 1, 4, 787, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #954 = FADDPv4f16
7817 { 970, 3, 1, 4, 473, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #970 = FADDv2f32
7819 { 972, 3, 1, 4, 929, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #972 = FADDv4f16
7838 { 991, 3, 1, 4, 470, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #991 = FCMEQ64
7848 { 1001, 3, 1, 4, 731, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1001 = FCMEQv2f32
7852 { 1005, 3, 1, 4, 789, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1005 = FCMEQv4f16
7860 { 1013, 3, 1, 4, 471, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1013 = FCMGE64
7870 { 1023, 3, 1, 4, 732, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1023 = FCMGEv2f32
7874 { 1027, 3, 1, 4, 790, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1027 = FCMGEv4f16
7882 { 1035, 3, 1, 4, 470, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1035 = FCMGT64
7892 { 1045, 3, 1, 4, 731, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1045 = FCMGTv2f32
7896 { 1049, 3, 1, 4, 789, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1049 = FCMGTv4f16
8175 { 1328, 3, 1, 4, 112, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1328 = FDIVDrr
8184 { 1337, 3, 1, 4, 248, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1337 = FDIVv2f32
8186 { 1339, 3, 1, 4, 849, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1339 = FDIVv4f16
8205 { 1358, 3, 1, 4, 435, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1358 = FMAXDrr
8207 { 1360, 3, 1, 4, 435, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1360 = FMAXNMDrr
8212 { 1365, 3, 1, 4, 254, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1365 = FMAXNMPv2f32
8217 { 1370, 3, 1, 4, 795, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1370 = FMAXNMPv4f16
8233 { 1386, 3, 1, 4, 252, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1386 = FMAXNMv2f32
8235 { 1388, 3, 1, 4, 794, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1388 = FMAXNMv4f16
8241 { 1394, 3, 1, 4, 254, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1394 = FMAXPv2f32
8246 { 1399, 3, 1, 4, 795, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1399 = FMAXPv4f16
8262 { 1415, 3, 1, 4, 252, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1415 = FMAXv2f32
8264 { 1417, 3, 1, 4, 794, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1417 = FMAXv4f16
8267 { 1420, 3, 1, 4, 435, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1420 = FMINDrr
8269 { 1422, 3, 1, 4, 435, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1422 = FMINNMDrr
8274 { 1427, 3, 1, 4, 254, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1427 = FMINNMPv2f32
8279 { 1432, 3, 1, 4, 795, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1432 = FMINNMPv4f16
8295 { 1448, 3, 1, 4, 252, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1448 = FMINNMv2f32
8297 { 1450, 3, 1, 4, 794, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1450 = FMINNMv4f16
8303 { 1456, 3, 1, 4, 254, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1456 = FMINPv2f32
8308 { 1461, 3, 1, 4, 795, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1461 = FMINPv4f16
8324 { 1477, 3, 1, 4, 252, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1477 = FMINv2f32
8326 { 1479, 3, 1, 4, 794, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1479 = FMINv4f16
8421 { 1574, 3, 1, 4, 448, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1574 = FMULDrr
8426 { 1579, 3, 1, 4, 450, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1579 = FMULX64
8433 { 1586, 3, 1, 4, 476, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1586 = FMULXv2f32
8437 { 1590, 3, 1, 4, 800, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1590 = FMULXv4f16
8458 { 1611, 3, 1, 4, 476, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1611 = FMULv2f32
8462 { 1615, 3, 1, 4, 800, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1615 = FMULv4f16
8497 { 1650, 3, 1, 4, 448, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1650 = FNMULDrr
8513 { 1666, 3, 1, 4, 275, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1666 = FRECPS64
8517 { 1670, 3, 1, 4, 460, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1670 = FRECPSv2f32
8519 { 1672, 3, 1, 4, 461, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1672 = FRECPSv4f16
8638 { 1791, 3, 1, 4, 277, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1791 = FRSQRTS64
8642 { 1795, 3, 1, 4, 462, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1795 = FRSQRTSv2f32
8644 { 1797, 3, 1, 4, 463, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1797 = FRSQRTSv4f16
8661 { 1814, 3, 1, 4, 290, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1814 = FSUBDrr
8679 { 1832, 3, 1, 4, 473, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1832 = FSUBv2f32
8681 { 1834, 3, 1, 4, 929, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1834 = FSUBv4f16
9675 { 2828, 3, 1, 4, 526, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #2828 = MULv2i32
9677 { 2830, 3, 1, 4, 526, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #2830 = MULv4i16
9683 { 2836, 3, 1, 4, 526, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #2836 = MULv8i8
9722 { 2875, 3, 1, 4, 490, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #2875 = ORNv8i8
9742 { 2895, 3, 1, 4, 490, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #2895 = ORRv8i8
9775 { 2928, 3, 1, 4, 218, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #2928 = PMULv8i8
9959 { 3112, 3, 1, 4, 509, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3112 = SABDv2i32
9960 { 3113, 3, 1, 4, 509, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3113 = SABDv4i16
9963 { 3116, 3, 1, 4, 509, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3116 = SABDv8i8
10101 { 3254, 3, 1, 4, 699, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3254 = SHADDv2i32
10102 { 3255, 3, 1, 4, 699, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3255 = SHADDv4i16
10105 { 3258, 3, 1, 4, 699, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3258 = SHADDv8i8
10141 { 3294, 3, 1, 4, 699, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3294 = SHSUBv2i32
10142 { 3295, 3, 1, 4, 699, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3295 = SHSUBv4i16
10145 { 3298, 3, 1, 4, 699, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3298 = SHSUBv8i8
10175 { 3328, 3, 1, 4, 502, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3328 = SMAXPv2i32
10176 { 3329, 3, 1, 4, 502, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3329 = SMAXPv4i16
10179 { 3332, 3, 1, 4, 502, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3332 = SMAXPv8i8
10198 { 3351, 3, 1, 4, 777, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3351 = SMAXv2i32
10199 { 3352, 3, 1, 4, 777, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3352 = SMAXv4i16
10202 { 3355, 3, 1, 4, 777, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3355 = SMAXv8i8
10209 { 3362, 3, 1, 4, 502, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3362 = SMINPv2i32
10210 { 3363, 3, 1, 4, 502, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3363 = SMINPv4i16
10213 { 3366, 3, 1, 4, 502, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3366 = SMINPv8i8
10232 { 3385, 3, 1, 4, 777, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3385 = SMINv2i32
10233 { 3386, 3, 1, 4, 777, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3386 = SMINv4i16
10236 { 3389, 3, 1, 4, 777, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3389 = SMINv8i8
10351 { 3504, 3, 1, 4, 512, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3504 = SQADDv1i64
10353 { 3506, 3, 1, 4, 701, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3506 = SQADDv2i32
10355 { 3508, 3, 1, 4, 701, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3508 = SQADDv4i16
10358 { 3511, 3, 1, 4, 701, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3511 = SQADDv8i8
10446 { 3599, 3, 1, 4, 446, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3599 = SQDMULHv2i32
10448 { 3601, 3, 1, 4, 446, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3601 = SQDMULHv4i16
10568 { 3721, 3, 1, 4, 446, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3721 = SQRDMULHv2i32
10570 { 3723, 3, 1, 4, 446, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3723 = SQRDMULHv4i16
10587 { 3740, 3, 1, 4, 442, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3740 = SQRSHLv1i64
10589 { 3742, 3, 1, 4, 442, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3742 = SQRSHLv2i32
10591 { 3744, 3, 1, 4, 442, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3744 = SQRSHLv4i16
10594 { 3747, 3, 1, 4, 442, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3747 = SQRSHLv8i8
10660 { 3813, 3, 1, 4, 237, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3813 = SQSHLv1i64
10662 { 3815, 3, 1, 4, 237, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3815 = SQSHLv2i32
10666 { 3819, 3, 1, 4, 237, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3819 = SQSHLv4i16
10672 { 3825, 3, 1, 4, 237, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3825 = SQSHLv8i8
10723 { 3876, 3, 1, 4, 516, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3876 = SQSUBv1i64
10725 { 3878, 3, 1, 4, 516, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3878 = SQSUBv2i32
10727 { 3880, 3, 1, 4, 516, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3880 = SQSUBv4i16
10730 { 3883, 3, 1, 4, 516, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3883 = SQSUBv8i8
10766 { 3919, 3, 1, 4, 517, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3919 = SRHADDv2i32
10767 { 3920, 3, 1, 4, 517, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3920 = SRHADDv4i16
10770 { 3923, 3, 1, 4, 517, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3923 = SRHADDv8i8
10792 { 3945, 3, 1, 4, 440, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3945 = SRSHLv1i64
10793 { 3946, 3, 1, 4, 440, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3946 = SRSHLv2i32
10795 { 3948, 3, 1, 4, 440, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3948 = SRSHLv4i16
10798 { 3951, 3, 1, 4, 440, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3951 = SRSHLv8i8
10836 { 3989, 3, 1, 4, 496, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3989 = SSHLv1i64
10837 { 3990, 3, 1, 4, 495, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3990 = SSHLv2i32
10839 { 3992, 3, 1, 4, 495, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3992 = SSHLv4i16
10842 { 3995, 3, 1, 4, 495, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #3995 = SSHLv8i8
11305 { 4458, 3, 1, 4, 493, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4458 = SUBv1i64
11306 { 4459, 3, 1, 4, 493, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4459 = SUBv2i32
11308 { 4461, 3, 1, 4, 493, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4461 = SUBv4i16
11311 { 4464, 3, 1, 4, 493, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4464 = SUBv8i8
11410 { 4563, 3, 1, 4, 759, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4563 = TRN1v2i32
11412 { 4565, 3, 1, 4, 759, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4565 = TRN1v4i16
11415 { 4568, 3, 1, 4, 759, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4568 = TRN1v8i8
11425 { 4578, 3, 1, 4, 759, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4578 = TRN2v2i32
11427 { 4580, 3, 1, 4, 759, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4580 = TRN2v4i16
11430 { 4583, 3, 1, 4, 759, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4583 = TRN2v8i8
11473 { 4626, 3, 1, 4, 509, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4626 = UABDv2i32
11474 { 4627, 3, 1, 4, 509, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4627 = UABDv4i16
11477 { 4630, 3, 1, 4, 509, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4630 = UABDv8i8
11583 { 4736, 3, 1, 4, 699, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4736 = UHADDv2i32
11584 { 4737, 3, 1, 4, 699, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4737 = UHADDv4i16
11587 { 4740, 3, 1, 4, 699, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4740 = UHADDv8i8
11597 { 4750, 3, 1, 4, 699, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4750 = UHSUBv2i32
11598 { 4751, 3, 1, 4, 699, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4751 = UHSUBv4i16
11601 { 4754, 3, 1, 4, 699, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4754 = UHSUBv8i8
11608 { 4761, 3, 1, 4, 502, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4761 = UMAXPv2i32
11609 { 4762, 3, 1, 4, 502, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4762 = UMAXPv4i16
11612 { 4765, 3, 1, 4, 502, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4765 = UMAXPv8i8
11631 { 4784, 3, 1, 4, 777, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4784 = UMAXv2i32
11632 { 4785, 3, 1, 4, 777, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4785 = UMAXv4i16
11635 { 4788, 3, 1, 4, 777, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4788 = UMAXv8i8
11641 { 4794, 3, 1, 4, 502, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4794 = UMINPv2i32
11642 { 4795, 3, 1, 4, 502, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4795 = UMINPv4i16
11645 { 4798, 3, 1, 4, 502, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4798 = UMINPv8i8
11664 { 4817, 3, 1, 4, 777, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4817 = UMINv2i32
11665 { 4818, 3, 1, 4, 777, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4818 = UMINv4i16
11668 { 4821, 3, 1, 4, 777, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4821 = UMINv8i8
11758 { 4911, 3, 1, 4, 512, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4911 = UQADDv1i64
11760 { 4913, 3, 1, 4, 701, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4913 = UQADDv2i32
11762 { 4915, 3, 1, 4, 701, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4915 = UQADDv4i16
11765 { 4918, 3, 1, 4, 701, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4918 = UQADDv8i8
11821 { 4974, 3, 1, 4, 442, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4974 = UQRSHLv1i64
11823 { 4976, 3, 1, 4, 442, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4976 = UQRSHLv2i32
11825 { 4978, 3, 1, 4, 442, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4978 = UQRSHLv4i16
11828 { 4981, 3, 1, 4, 442, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #4981 = UQRSHLv8i8
11864 { 5017, 3, 1, 4, 237, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5017 = UQSHLv1i64
11866 { 5019, 3, 1, 4, 237, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5019 = UQSHLv2i32
11870 { 5023, 3, 1, 4, 237, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5023 = UQSHLv4i16
11876 { 5029, 3, 1, 4, 237, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5029 = UQSHLv8i8
11912 { 5065, 3, 1, 4, 516, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5065 = UQSUBv1i64
11914 { 5067, 3, 1, 4, 516, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5067 = UQSUBv2i32
11916 { 5069, 3, 1, 4, 516, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5069 = UQSUBv4i16
11919 { 5072, 3, 1, 4, 516, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5072 = UQSUBv8i8
11943 { 5096, 3, 1, 4, 517, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5096 = URHADDv2i32
11944 { 5097, 3, 1, 4, 517, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5097 = URHADDv4i16
11947 { 5100, 3, 1, 4, 517, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5100 = URHADDv8i8
11957 { 5110, 3, 1, 4, 440, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5110 = URSHLv1i64
11958 { 5111, 3, 1, 4, 440, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5111 = URSHLv2i32
11960 { 5113, 3, 1, 4, 440, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5113 = URSHLv4i16
11963 { 5116, 3, 1, 4, 440, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5116 = URSHLv8i8
12004 { 5157, 3, 1, 4, 496, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5157 = USHLv1i64
12005 { 5158, 3, 1, 4, 495, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5158 = USHLv2i32
12007 { 5160, 3, 1, 4, 495, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5160 = USHLv4i16
12010 { 5163, 3, 1, 4, 495, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5163 = USHLv8i8
12091 { 5244, 3, 1, 4, 808, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5244 = UZP1v2i32
12093 { 5246, 3, 1, 4, 808, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5246 = UZP1v4i16
12096 { 5249, 3, 1, 4, 808, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5249 = UZP1v8i8
12106 { 5259, 3, 1, 4, 808, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5259 = UZP2v2i32
12108 { 5261, 3, 1, 4, 808, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5261 = UZP2v4i16
12111 { 5264, 3, 1, 4, 808, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5264 = UZP2v8i8
12209 { 5362, 3, 1, 4, 761, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5362 = ZIP1v2i32
12211 { 5364, 3, 1, 4, 761, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5364 = ZIP1v4i16
12214 { 5367, 3, 1, 4, 761, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5367 = ZIP1v8i8
12224 { 5377, 3, 1, 4, 761, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5377 = ZIP2v2i32
12226 { 5379, 3, 1, 4, 761, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5379 = ZIP2v4i16
12229 { 5382, 3, 1, 4, 761, 0, 0x1ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #5382 = ZIP2v8i8