|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc 7078 { 231, 3, 1, 4, 540, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #231 = ADDPv16i8
7080 { 233, 3, 1, 4, 532, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #233 = ADDPv2i64
7083 { 236, 3, 1, 4, 540, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #236 = ADDPv4i32
7084 { 237, 3, 1, 4, 540, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #237 = ADDPv8i16
7123 { 276, 3, 1, 4, 531, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #276 = ADDv16i8
7126 { 279, 3, 1, 4, 531, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #279 = ADDv2i64
7128 { 281, 3, 1, 4, 531, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #281 = ADDv4i32
7129 { 282, 3, 1, 4, 531, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #282 = ADDv8i16
7185 { 338, 3, 1, 4, 533, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #338 = ANDv16i8
7262 { 415, 3, 1, 4, 533, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #415 = BICv16i8
7268 { 421, 3, 1, 4, 263, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #421 = BIFv16i8
7397 { 550, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #550 = CMEQv16i8
7403 { 556, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #556 = CMEQv2i64
7407 { 560, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #560 = CMEQv4i32
7409 { 562, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #562 = CMEQv8i16
7413 { 566, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #566 = CMGEv16i8
7419 { 572, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #572 = CMGEv2i64
7423 { 576, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #576 = CMGEv4i32
7425 { 578, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #578 = CMGEv8i16
7429 { 582, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #582 = CMGTv16i8
7435 { 588, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #588 = CMGTv2i64
7439 { 592, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #592 = CMGTv4i32
7441 { 594, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #594 = CMGTv8i16
7445 { 598, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #598 = CMHIv16i8
7448 { 601, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #601 = CMHIv2i64
7450 { 603, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #603 = CMHIv4i32
7451 { 604, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #604 = CMHIv8i16
7453 { 606, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #606 = CMHSv16i8
7456 { 609, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #609 = CMHSv2i64
7458 { 611, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #611 = CMHSv4i32
7459 { 612, 3, 1, 4, 541, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #612 = CMHSv8i16
7582 { 735, 3, 1, 4, 542, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #735 = CMTSTv16i8
7585 { 738, 3, 1, 4, 542, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #738 = CMTSTv2i64
7587 { 740, 3, 1, 4, 542, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #740 = CMTSTv4i32
7588 { 741, 3, 1, 4, 542, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #741 = CMTSTv8i16
7732 { 885, 3, 1, 4, 533, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #885 = EORv16i8
7751 { 904, 3, 1, 4, 240, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #904 = FABDv2f64
7753 { 906, 3, 1, 4, 425, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #906 = FABDv4f32
7754 { 907, 3, 1, 4, 785, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #907 = FABDv8f16
7773 { 926, 3, 1, 4, 434, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #926 = FACGEv2f64
7775 { 928, 3, 1, 4, 434, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #928 = FACGEv4f32
7776 { 929, 3, 1, 4, 788, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #929 = FACGEv8f16
7784 { 937, 3, 1, 4, 434, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #937 = FACGTv2f64
7786 { 939, 3, 1, 4, 434, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #939 = FACGTv4f32
7787 { 940, 3, 1, 4, 788, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #940 = FACGTv8f16
7797 { 950, 3, 1, 4, 242, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #950 = FADDPv2f64
7802 { 955, 3, 1, 4, 426, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #955 = FADDPv4f32
7803 { 956, 3, 1, 4, 787, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #956 = FADDPv8f16
7818 { 971, 3, 1, 4, 928, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #971 = FADDv2f64
7820 { 973, 3, 1, 4, 930, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #973 = FADDv4f32
7821 { 974, 3, 1, 4, 929, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #974 = FADDv8f16
7849 { 1002, 3, 1, 4, 479, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1002 = FCMEQv2f64
7853 { 1006, 3, 1, 4, 479, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1006 = FCMEQv4f32
7856 { 1009, 3, 1, 4, 789, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1009 = FCMEQv8f16
7871 { 1024, 3, 1, 4, 480, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1024 = FCMGEv2f64
7875 { 1028, 3, 1, 4, 480, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1028 = FCMGEv4f32
7878 { 1031, 3, 1, 4, 790, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1031 = FCMGEv8f16
7893 { 1046, 3, 1, 4, 479, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1046 = FCMGTv2f64
7897 { 1050, 3, 1, 4, 479, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1050 = FCMGTv4f32
7900 { 1053, 3, 1, 4, 789, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1053 = FCMGTv8f16
8185 { 1338, 3, 1, 4, 114, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1338 = FDIVv2f64
8187 { 1340, 3, 1, 4, 113, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1340 = FDIVv4f32
8188 { 1341, 3, 1, 4, 850, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1341 = FDIVv8f16
8213 { 1366, 3, 1, 4, 255, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1366 = FMAXNMPv2f64
8218 { 1371, 3, 1, 4, 255, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1371 = FMAXNMPv4f32
8219 { 1372, 3, 1, 4, 796, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1372 = FMAXNMPv8f16
8234 { 1387, 3, 1, 4, 253, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1387 = FMAXNMv2f64
8236 { 1389, 3, 1, 4, 253, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1389 = FMAXNMv4f32
8237 { 1390, 3, 1, 4, 794, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1390 = FMAXNMv8f16
8242 { 1395, 3, 1, 4, 255, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1395 = FMAXPv2f64
8247 { 1400, 3, 1, 4, 255, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1400 = FMAXPv4f32
8248 { 1401, 3, 1, 4, 796, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1401 = FMAXPv8f16
8263 { 1416, 3, 1, 4, 253, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1416 = FMAXv2f64
8265 { 1418, 3, 1, 4, 253, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1418 = FMAXv4f32
8266 { 1419, 3, 1, 4, 794, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1419 = FMAXv8f16
8275 { 1428, 3, 1, 4, 255, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1428 = FMINNMPv2f64
8280 { 1433, 3, 1, 4, 255, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1433 = FMINNMPv4f32
8281 { 1434, 3, 1, 4, 796, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1434 = FMINNMPv8f16
8296 { 1449, 3, 1, 4, 253, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1449 = FMINNMv2f64
8298 { 1451, 3, 1, 4, 253, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1451 = FMINNMv4f32
8299 { 1452, 3, 1, 4, 794, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1452 = FMINNMv8f16
8304 { 1457, 3, 1, 4, 255, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1457 = FMINPv2f64
8309 { 1462, 3, 1, 4, 255, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1462 = FMINPv4f32
8310 { 1463, 3, 1, 4, 796, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1463 = FMINPv8f16
8325 { 1478, 3, 1, 4, 253, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1478 = FMINv2f64
8327 { 1480, 3, 1, 4, 253, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1480 = FMINv4f32
8328 { 1481, 3, 1, 4, 794, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1481 = FMINv8f16
8434 { 1587, 3, 1, 4, 484, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1587 = FMULXv2f64
8438 { 1591, 3, 1, 4, 258, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1591 = FMULXv4f32
8441 { 1594, 3, 1, 4, 800, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1594 = FMULXv8f16
8459 { 1612, 3, 1, 4, 484, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1612 = FMULv2f64
8463 { 1616, 3, 1, 4, 258, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1616 = FMULv4f32
8466 { 1619, 3, 1, 4, 800, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1619 = FMULv8f16
8518 { 1671, 3, 1, 4, 278, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1671 = FRECPSv2f64
8520 { 1673, 3, 1, 4, 607, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1673 = FRECPSv4f32
8521 { 1674, 3, 1, 4, 461, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1674 = FRECPSv8f16
8643 { 1796, 3, 1, 4, 116, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1796 = FRSQRTSv2f64
8645 { 1798, 3, 1, 4, 115, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1798 = FRSQRTSv4f32
8646 { 1799, 3, 1, 4, 463, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1799 = FRSQRTSv8f16
8680 { 1833, 3, 1, 4, 928, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1833 = FSUBv2f64
8682 { 1835, 3, 1, 4, 930, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1835 = FSUBv4f32
8683 { 1836, 3, 1, 4, 929, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #1836 = FSUBv8f16
9674 { 2827, 3, 1, 4, 445, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #2827 = MULv16i8
9679 { 2832, 3, 1, 4, 445, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #2832 = MULv4i32
9681 { 2834, 3, 1, 4, 445, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #2834 = MULv8i16
9721 { 2874, 3, 1, 4, 533, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #2874 = ORNv16i8
9737 { 2890, 3, 1, 4, 403, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #2890 = ORRv16i8
9769 { 2922, 3, 1, 4, 226, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #2922 = PMULLv16i8
9771 { 2924, 3, 1, 4, 227, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #2924 = PMULLv2i64
9774 { 2927, 3, 1, 4, 219, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #2927 = PMULv16i8
9844 { 2997, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #2997 = RAX1
9948 { 3101, 3, 1, 4, 417, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3101 = SABDLv16i8_v8i16
9951 { 3104, 3, 1, 4, 417, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3104 = SABDLv4i32_v2i64
9952 { 3105, 3, 1, 4, 417, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3105 = SABDLv8i16_v4i32
9958 { 3111, 3, 1, 4, 545, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3111 = SABDv16i8
9961 { 3114, 3, 1, 4, 545, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3114 = SABDv4i32
9962 { 3115, 3, 1, 4, 545, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3115 = SABDv8i16
9993 { 3146, 3, 1, 4, 536, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3146 = SADDLv16i8_v8i16
9996 { 3149, 3, 1, 4, 536, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3149 = SADDLv4i32_v2i64
9997 { 3150, 3, 1, 4, 536, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3150 = SADDLv8i16_v4i32
10008 { 3161, 3, 1, 4, 773, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3161 = SADDWv16i8_v8i16
10011 { 3164, 3, 1, 4, 773, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3164 = SADDWv4i32_v2i64
10012 { 3165, 3, 1, 4, 773, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3165 = SADDWv8i16_v4i32
10100 { 3253, 3, 1, 4, 537, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3253 = SHADDv16i8
10103 { 3256, 3, 1, 4, 537, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3256 = SHADDv4i32
10104 { 3257, 3, 1, 4, 537, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3257 = SHADDv8i16
10140 { 3293, 3, 1, 4, 537, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3293 = SHSUBv16i8
10143 { 3296, 3, 1, 4, 537, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3296 = SHSUBv4i32
10144 { 3297, 3, 1, 4, 537, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3297 = SHSUBv8i16
10167 { 3320, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3320 = SM4ENCKEY
10174 { 3327, 3, 1, 4, 416, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3327 = SMAXPv16i8
10177 { 3330, 3, 1, 4, 416, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3330 = SMAXPv4i32
10178 { 3331, 3, 1, 4, 416, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3331 = SMAXPv8i16
10197 { 3350, 3, 1, 4, 776, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3350 = SMAXv16i8
10200 { 3353, 3, 1, 4, 776, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3353 = SMAXv4i32
10201 { 3354, 3, 1, 4, 776, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3354 = SMAXv8i16
10208 { 3361, 3, 1, 4, 416, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3361 = SMINPv16i8
10211 { 3364, 3, 1, 4, 416, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3364 = SMINPv4i32
10212 { 3365, 3, 1, 4, 416, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3365 = SMINPv8i16
10231 { 3384, 3, 1, 4, 776, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3384 = SMINv16i8
10234 { 3387, 3, 1, 4, 776, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3387 = SMINv4i32
10235 { 3388, 3, 1, 4, 776, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3388 = SMINv8i16
10302 { 3455, 3, 1, 4, 447, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3455 = SMULLv16i8_v8i16
10308 { 3461, 3, 1, 4, 447, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3461 = SMULLv4i32_v2i64
10310 { 3463, 3, 1, 4, 447, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3463 = SMULLv8i16_v4i32
10348 { 3501, 3, 1, 4, 546, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3501 = SQADDv16i8
10354 { 3507, 3, 1, 4, 546, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3507 = SQADDv2i64
10356 { 3509, 3, 1, 4, 546, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3509 = SQADDv4i32
10357 { 3510, 3, 1, 4, 546, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3510 = SQADDv8i16
10450 { 3603, 3, 1, 4, 445, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3603 = SQDMULHv4i32
10452 { 3605, 3, 1, 4, 445, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3605 = SQDMULHv8i16
10473 { 3626, 3, 1, 4, 550, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3626 = SQDMULLv4i32_v2i64
10475 { 3628, 3, 1, 4, 550, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3628 = SQDMULLv8i16_v4i32
10572 { 3725, 3, 1, 4, 445, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3725 = SQRDMULHv4i32
10574 { 3727, 3, 1, 4, 445, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3727 = SQRDMULHv8i16
10584 { 3737, 3, 1, 4, 441, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3737 = SQRSHLv16i8
10590 { 3743, 3, 1, 4, 441, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3743 = SQRSHLv2i64
10592 { 3745, 3, 1, 4, 441, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3745 = SQRSHLv4i32
10593 { 3746, 3, 1, 4, 441, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3746 = SQRSHLv8i16
10656 { 3809, 3, 1, 4, 238, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3809 = SQSHLv16i8
10664 { 3817, 3, 1, 4, 238, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3817 = SQSHLv2i64
10668 { 3821, 3, 1, 4, 238, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3821 = SQSHLv4i32
10670 { 3823, 3, 1, 4, 238, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3823 = SQSHLv8i16
10720 { 3873, 3, 1, 4, 412, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3873 = SQSUBv16i8
10726 { 3879, 3, 1, 4, 412, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3879 = SQSUBv2i64
10728 { 3881, 3, 1, 4, 412, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3881 = SQSUBv4i32
10729 { 3882, 3, 1, 4, 412, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3882 = SQSUBv8i16
10765 { 3918, 3, 1, 4, 548, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3918 = SRHADDv16i8
10768 { 3921, 3, 1, 4, 548, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3921 = SRHADDv4i32
10769 { 3922, 3, 1, 4, 548, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3922 = SRHADDv8i16
10791 { 3944, 3, 1, 4, 439, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3944 = SRSHLv16i8
10794 { 3947, 3, 1, 4, 439, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3947 = SRSHLv2i64
10796 { 3949, 3, 1, 4, 439, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3949 = SRSHLv4i32
10797 { 3950, 3, 1, 4, 439, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3950 = SRSHLv8i16
10835 { 3988, 3, 1, 4, 236, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3988 = SSHLv16i8
10838 { 3991, 3, 1, 4, 236, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3991 = SSHLv2i64
10840 { 3993, 3, 1, 4, 236, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3993 = SSHLv4i32
10841 { 3994, 3, 1, 4, 236, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #3994 = SSHLv8i16
10913 { 4066, 3, 1, 4, 539, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4066 = SSUBLv16i8_v8i16
10916 { 4069, 3, 1, 4, 539, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4069 = SSUBLv4i32_v2i64
10917 { 4070, 3, 1, 4, 539, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4070 = SSUBLv8i16_v4i32
10925 { 4078, 3, 1, 4, 553, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4078 = SSUBWv16i8_v8i16
10928 { 4081, 3, 1, 4, 553, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4081 = SSUBWv4i32_v2i64
10929 { 4082, 3, 1, 4, 553, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4082 = SSUBWv8i16_v4i32
11304 { 4457, 3, 1, 4, 710, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4457 = SUBv16i8
11307 { 4460, 3, 1, 4, 710, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4460 = SUBv2i64
11309 { 4462, 3, 1, 4, 710, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4462 = SUBv4i32
11310 { 4463, 3, 1, 4, 710, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4463 = SUBv8i16
11370 { 4523, 3, 1, 4, 603, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4523 = TBLv16i8One
11409 { 4562, 3, 1, 4, 758, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4562 = TRN1v16i8
11411 { 4564, 3, 1, 4, 756, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4564 = TRN1v2i64
11413 { 4566, 3, 1, 4, 758, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4566 = TRN1v4i32
11414 { 4567, 3, 1, 4, 758, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4567 = TRN1v8i16
11424 { 4577, 3, 1, 4, 758, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4577 = TRN2v16i8
11426 { 4579, 3, 1, 4, 756, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4579 = TRN2v2i64
11428 { 4581, 3, 1, 4, 758, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4581 = TRN2v4i32
11429 { 4582, 3, 1, 4, 758, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4582 = TRN2v8i16
11462 { 4615, 3, 1, 4, 417, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4615 = UABDLv16i8_v8i16
11465 { 4618, 3, 1, 4, 417, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4618 = UABDLv4i32_v2i64
11466 { 4619, 3, 1, 4, 417, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4619 = UABDLv8i16_v4i32
11472 { 4625, 3, 1, 4, 545, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4625 = UABDv16i8
11475 { 4628, 3, 1, 4, 545, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4628 = UABDv4i32
11476 { 4629, 3, 1, 4, 545, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4629 = UABDv8i16
11504 { 4657, 3, 1, 4, 536, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4657 = UADDLv16i8_v8i16
11507 { 4660, 3, 1, 4, 536, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4660 = UADDLv4i32_v2i64
11508 { 4661, 3, 1, 4, 536, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4661 = UADDLv8i16_v4i32
11520 { 4673, 3, 1, 4, 773, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4673 = UADDWv16i8_v8i16
11523 { 4676, 3, 1, 4, 773, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4676 = UADDWv4i32_v2i64
11524 { 4677, 3, 1, 4, 773, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4677 = UADDWv8i16_v4i32
11582 { 4735, 3, 1, 4, 537, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4735 = UHADDv16i8
11585 { 4738, 3, 1, 4, 537, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4738 = UHADDv4i32
11586 { 4739, 3, 1, 4, 537, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4739 = UHADDv8i16
11596 { 4749, 3, 1, 4, 537, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4749 = UHSUBv16i8
11599 { 4752, 3, 1, 4, 537, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4752 = UHSUBv4i32
11600 { 4753, 3, 1, 4, 537, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4753 = UHSUBv8i16
11607 { 4760, 3, 1, 4, 416, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4760 = UMAXPv16i8
11610 { 4763, 3, 1, 4, 416, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4763 = UMAXPv4i32
11611 { 4764, 3, 1, 4, 416, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4764 = UMAXPv8i16
11630 { 4783, 3, 1, 4, 776, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4783 = UMAXv16i8
11633 { 4786, 3, 1, 4, 776, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4786 = UMAXv4i32
11634 { 4787, 3, 1, 4, 776, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4787 = UMAXv8i16
11640 { 4793, 3, 1, 4, 416, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4793 = UMINPv16i8
11643 { 4796, 3, 1, 4, 416, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4796 = UMINPv4i32
11644 { 4797, 3, 1, 4, 416, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4797 = UMINPv8i16
11663 { 4816, 3, 1, 4, 776, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4816 = UMINv16i8
11666 { 4819, 3, 1, 4, 776, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4819 = UMINv4i32
11667 { 4820, 3, 1, 4, 776, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4820 = UMINv8i16
11733 { 4886, 3, 1, 4, 447, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4886 = UMULLv16i8_v8i16
11739 { 4892, 3, 1, 4, 447, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4892 = UMULLv4i32_v2i64
11741 { 4894, 3, 1, 4, 447, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4894 = UMULLv8i16_v4i32
11755 { 4908, 3, 1, 4, 546, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4908 = UQADDv16i8
11761 { 4914, 3, 1, 4, 546, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4914 = UQADDv2i64
11763 { 4916, 3, 1, 4, 546, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4916 = UQADDv4i32
11764 { 4917, 3, 1, 4, 546, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4917 = UQADDv8i16
11818 { 4971, 3, 1, 4, 441, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4971 = UQRSHLv16i8
11824 { 4977, 3, 1, 4, 441, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4977 = UQRSHLv2i64
11826 { 4979, 3, 1, 4, 441, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4979 = UQRSHLv4i32
11827 { 4980, 3, 1, 4, 441, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #4980 = UQRSHLv8i16
11860 { 5013, 3, 1, 4, 238, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5013 = UQSHLv16i8
11868 { 5021, 3, 1, 4, 238, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5021 = UQSHLv2i64
11872 { 5025, 3, 1, 4, 238, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5025 = UQSHLv4i32
11874 { 5027, 3, 1, 4, 238, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5027 = UQSHLv8i16
11909 { 5062, 3, 1, 4, 412, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5062 = UQSUBv16i8
11915 { 5068, 3, 1, 4, 412, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5068 = UQSUBv2i64
11917 { 5070, 3, 1, 4, 412, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5070 = UQSUBv4i32
11918 { 5071, 3, 1, 4, 412, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5071 = UQSUBv8i16
11942 { 5095, 3, 1, 4, 548, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5095 = URHADDv16i8
11945 { 5098, 3, 1, 4, 548, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5098 = URHADDv4i32
11946 { 5099, 3, 1, 4, 548, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5099 = URHADDv8i16
11956 { 5109, 3, 1, 4, 439, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5109 = URSHLv16i8
11959 { 5112, 3, 1, 4, 439, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5112 = URSHLv2i64
11961 { 5114, 3, 1, 4, 439, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5114 = URSHLv4i32
11962 { 5115, 3, 1, 4, 439, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5115 = URSHLv8i16
12003 { 5156, 3, 1, 4, 236, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5156 = USHLv16i8
12006 { 5159, 3, 1, 4, 236, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5159 = USHLv2i64
12008 { 5161, 3, 1, 4, 236, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5161 = USHLv4i32
12009 { 5162, 3, 1, 4, 236, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5162 = USHLv8i16
12052 { 5205, 3, 1, 4, 539, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5205 = USUBLv16i8_v8i16
12055 { 5208, 3, 1, 4, 539, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5208 = USUBLv4i32_v2i64
12056 { 5209, 3, 1, 4, 539, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5209 = USUBLv8i16_v4i32
12064 { 5217, 3, 1, 4, 553, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5217 = USUBWv16i8_v8i16
12067 { 5220, 3, 1, 4, 553, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5220 = USUBWv4i32_v2i64
12068 { 5221, 3, 1, 4, 553, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5221 = USUBWv8i16_v4i32
12090 { 5243, 3, 1, 4, 760, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5243 = UZP1v16i8
12092 { 5245, 3, 1, 4, 809, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5245 = UZP1v2i64
12094 { 5247, 3, 1, 4, 760, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5247 = UZP1v4i32
12095 { 5248, 3, 1, 4, 760, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5248 = UZP1v8i16
12105 { 5258, 3, 1, 4, 760, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5258 = UZP2v16i8
12107 { 5260, 3, 1, 4, 809, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5260 = UZP2v2i64
12109 { 5262, 3, 1, 4, 760, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5262 = UZP2v4i32
12110 { 5263, 3, 1, 4, 760, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5263 = UZP2v8i16
12208 { 5361, 3, 1, 4, 289, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5361 = ZIP1v16i8
12210 { 5363, 3, 1, 4, 757, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5363 = ZIP1v2i64
12212 { 5365, 3, 1, 4, 289, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5365 = ZIP1v4i32
12213 { 5366, 3, 1, 4, 289, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5366 = ZIP1v8i16
12223 { 5376, 3, 1, 4, 757, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5376 = ZIP2v16i8
12225 { 5378, 3, 1, 4, 757, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5378 = ZIP2v2i64
12227 { 5380, 3, 1, 4, 757, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5380 = ZIP2v4i32
12228 { 5381, 3, 1, 4, 757, 0, 0x1ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #5381 = ZIP2v8i16