|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc 7045 { 198, 2, 1, 4, 499, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #198 = ABSv1i64
7046 { 199, 2, 1, 4, 697, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #199 = ABSv2i32
7048 { 201, 2, 1, 4, 697, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #201 = ABSv4i16
7051 { 204, 2, 1, 4, 697, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #204 = ABSv8i8
7380 { 533, 2, 1, 4, 854, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #533 = CLSv2i32
7381 { 534, 2, 1, 4, 854, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #534 = CLSv4i16
7384 { 537, 2, 1, 4, 854, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #537 = CLSv8i8
7392 { 545, 2, 1, 4, 854, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #545 = CLZv2i32
7393 { 546, 2, 1, 4, 854, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #546 = CLZv4i16
7396 { 549, 2, 1, 4, 854, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #549 = CLZv8i8
7400 { 553, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #553 = CMEQv1i64rz
7402 { 555, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #555 = CMEQv2i32rz
7406 { 559, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #559 = CMEQv4i16rz
7412 { 565, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #565 = CMEQv8i8rz
7416 { 569, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #569 = CMGEv1i64rz
7418 { 571, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #571 = CMGEv2i32rz
7422 { 575, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #575 = CMGEv4i16rz
7428 { 581, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #581 = CMGEv8i8rz
7432 { 585, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #585 = CMGTv1i64rz
7434 { 587, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #587 = CMGTv2i32rz
7438 { 591, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #591 = CMGTv4i16rz
7444 { 597, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #597 = CMGTv8i8rz
7468 { 621, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #621 = CMLEv1i64rz
7469 { 622, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #622 = CMLEv2i32rz
7471 { 624, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #624 = CMLEv4i16rz
7474 { 627, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #627 = CMLEv8i8rz
7476 { 629, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #629 = CMLTv1i64rz
7477 { 630, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #630 = CMLTv2i32rz
7479 { 632, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #632 = CMLTv4i16rz
7482 { 635, 2, 1, 4, 503, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #635 = CMLTv8i8rz
7607 { 760, 2, 1, 4, 728, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #760 = CNTv8i8
7755 { 908, 2, 1, 4, 818, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #908 = FABSDr
7761 { 914, 2, 1, 4, 823, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #914 = FABSv2f32
7763 { 916, 2, 1, 4, 825, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #916 = FABSv4f16
7847 { 1000, 2, 1, 4, 734, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1000 = FCMEQv1i64rz
7850 { 1003, 2, 1, 4, 428, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1003 = FCMEQv2i32rz
7854 { 1007, 2, 1, 4, 789, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1007 = FCMEQv4i16rz
7869 { 1022, 2, 1, 4, 735, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1022 = FCMGEv1i64rz
7872 { 1025, 2, 1, 4, 243, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1025 = FCMGEv2i32rz
7876 { 1029, 2, 1, 4, 790, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1029 = FCMGEv4i16rz
7891 { 1044, 2, 1, 4, 734, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1044 = FCMGTv1i64rz
7894 { 1047, 2, 1, 4, 428, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1047 = FCMGTv2i32rz
7898 { 1051, 2, 1, 4, 789, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1051 = FCMGTv4i16rz
7920 { 1073, 2, 1, 4, 734, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1073 = FCMLEv1i64rz
7921 { 1074, 2, 1, 4, 428, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1074 = FCMLEv2i32rz
7923 { 1076, 2, 1, 4, 789, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1076 = FCMLEv4i16rz
7931 { 1084, 2, 1, 4, 734, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1084 = FCMLTv1i64rz
7932 { 1085, 2, 1, 4, 428, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1085 = FCMLTv2i32rz
7934 { 1087, 2, 1, 4, 789, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1087 = FCMLTv4i16rz
7944 { 1097, 2, 0, 4, 626, 0, 0x1ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr }, // Inst #1097 = FCMPDrr
7946 { 1099, 2, 0, 4, 626, 0, 0x1ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr }, // Inst #1099 = FCMPEDrr
7972 { 1125, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1125 = FCVTASv1i64
7973 { 1126, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1126 = FCVTASv2f32
7975 { 1128, 2, 1, 4, 791, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1128 = FCVTASv4f16
7986 { 1139, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1139 = FCVTAUv1i64
7987 { 1140, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1140 = FCVTAUv2f32
7989 { 1142, 2, 1, 4, 791, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1142 = FCVTAUv4f16
8010 { 1163, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1163 = FCVTMSv1i64
8011 { 1164, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1164 = FCVTMSv2f32
8013 { 1166, 2, 1, 4, 791, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1166 = FCVTMSv4f16
8024 { 1177, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1177 = FCVTMUv1i64
8025 { 1178, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1178 = FCVTMUv2f32
8027 { 1180, 2, 1, 4, 791, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1180 = FCVTMUv4f16
8038 { 1191, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1191 = FCVTNSv1i64
8039 { 1192, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1192 = FCVTNSv2f32
8041 { 1194, 2, 1, 4, 791, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1194 = FCVTNSv4f16
8054 { 1207, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1207 = FCVTNUv1i64
8055 { 1208, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1208 = FCVTNUv2f32
8057 { 1210, 2, 1, 4, 791, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1210 = FCVTNUv4f16
8072 { 1225, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1225 = FCVTPSv1i64
8073 { 1226, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1226 = FCVTPSv2f32
8075 { 1228, 2, 1, 4, 791, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1228 = FCVTPSv4f16
8086 { 1239, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1239 = FCVTPUv1i64
8087 { 1240, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1240 = FCVTPUv2f32
8089 { 1242, 2, 1, 4, 791, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1242 = FCVTPUv4f16
8123 { 1276, 2, 1, 4, 474, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1276 = FCVTZSv1i64
8124 { 1277, 2, 1, 4, 474, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1277 = FCVTZSv2f32
8128 { 1281, 2, 1, 4, 791, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1281 = FCVTZSv4f16
8158 { 1311, 2, 1, 4, 474, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1311 = FCVTZUv1i64
8159 { 1312, 2, 1, 4, 474, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1312 = FCVTZUv2f32
8163 { 1316, 2, 1, 4, 791, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1316 = FCVTZUv4f16
8395 { 1548, 2, 1, 4, 637, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1548 = FMOVDr
8468 { 1621, 2, 1, 4, 628, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1621 = FNEGDr
8474 { 1627, 2, 1, 4, 468, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1627 = FNEGv2f32
8476 { 1629, 2, 1, 4, 784, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1629 = FNEGv4f16
8505 { 1658, 2, 1, 4, 746, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1658 = FRECPEv1i64
8506 { 1659, 2, 1, 4, 597, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1659 = FRECPEv2f32
8508 { 1661, 2, 1, 4, 456, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1661 = FRECPEv4f16
8527 { 1680, 2, 1, 4, 598, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1680 = FRECPXv1i64
8528 { 1681, 2, 1, 4, 298, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1681 = FRINT32XDr
8530 { 1683, 2, 1, 4, 1, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1683 = FRINT32Xv2f32
8533 { 1686, 2, 1, 4, 298, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1686 = FRINT32ZDr
8535 { 1688, 2, 1, 4, 1, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1688 = FRINT32Zv2f32
8538 { 1691, 2, 1, 4, 298, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1691 = FRINT64XDr
8540 { 1693, 2, 1, 4, 1, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1693 = FRINT64Xv2f32
8543 { 1696, 2, 1, 4, 298, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1696 = FRINT64ZDr
8545 { 1698, 2, 1, 4, 1, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1698 = FRINT64Zv2f32
8548 { 1701, 2, 1, 4, 631, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1701 = FRINTADr
8554 { 1707, 2, 1, 4, 261, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1707 = FRINTAv2f32
8556 { 1709, 2, 1, 4, 805, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1709 = FRINTAv4f16
8559 { 1712, 2, 1, 4, 631, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1712 = FRINTIDr
8565 { 1718, 2, 1, 4, 261, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1718 = FRINTIv2f32
8567 { 1720, 2, 1, 4, 805, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1720 = FRINTIv4f16
8570 { 1723, 2, 1, 4, 631, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1723 = FRINTMDr
8576 { 1729, 2, 1, 4, 261, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1729 = FRINTMv2f32
8578 { 1731, 2, 1, 4, 805, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1731 = FRINTMv4f16
8581 { 1734, 2, 1, 4, 631, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1734 = FRINTNDr
8587 { 1740, 2, 1, 4, 261, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1740 = FRINTNv2f32
8589 { 1742, 2, 1, 4, 805, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1742 = FRINTNv4f16
8592 { 1745, 2, 1, 4, 631, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1745 = FRINTPDr
8598 { 1751, 2, 1, 4, 261, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1751 = FRINTPv2f32
8600 { 1753, 2, 1, 4, 805, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1753 = FRINTPv4f16
8603 { 1756, 2, 1, 4, 631, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1756 = FRINTXDr
8609 { 1762, 2, 1, 4, 261, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1762 = FRINTXv2f32
8611 { 1764, 2, 1, 4, 805, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1764 = FRINTXv4f16
8614 { 1767, 2, 1, 4, 631, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1767 = FRINTZDr
8620 { 1773, 2, 1, 4, 261, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1773 = FRINTZv2f32
8622 { 1775, 2, 1, 4, 805, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1775 = FRINTZv4f16
8630 { 1783, 2, 1, 4, 271, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1783 = FRSQRTEv1i64
8631 { 1784, 2, 1, 4, 270, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1784 = FRSQRTEv2f32
8633 { 1786, 2, 1, 4, 459, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1786 = FRSQRTEv4f16
8650 { 1803, 2, 1, 4, 299, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1803 = FSQRTDr
8656 { 1809, 2, 1, 4, 249, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1809 = FSQRTv2f32
8658 { 1811, 2, 1, 4, 851, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1811 = FSQRTv4f16
9698 { 2851, 2, 1, 4, 492, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #2851 = NEGv1i64
9699 { 2852, 2, 1, 4, 492, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #2852 = NEGv2i32
9701 { 2854, 2, 1, 4, 492, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #2854 = NEGv4i16
9704 { 2857, 2, 1, 4, 492, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #2857 = NEGv8i8
9714 { 2867, 2, 1, 4, 593, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #2867 = NOTv8i8
9853 { 3006, 2, 1, 4, 596, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3006 = RBITv8i8
9865 { 3018, 2, 1, 4, 754, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3018 = REV16v8i8
9868 { 3021, 2, 1, 4, 754, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3021 = REV32v4i16
9870 { 3023, 2, 1, 4, 754, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3023 = REV32v8i8
9872 { 3025, 2, 1, 4, 754, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3025 = REV64v2i32
9873 { 3026, 2, 1, 4, 754, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3026 = REV64v4i16
9876 { 3029, 2, 1, 4, 754, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3029 = REV64v8i8
9980 { 3133, 2, 1, 4, 494, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3133 = SADDLPv2i32_v1i64
9981 { 3134, 2, 1, 4, 494, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3134 = SADDLPv4i16_v2i32
9984 { 3137, 2, 1, 4, 494, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3137 = SADDLPv8i8_v4i16
10049 { 3202, 2, 1, 4, 793, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3202 = SCVTFv1i64
10050 { 3203, 2, 1, 4, 793, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3203 = SCVTFv2f32
10054 { 3207, 2, 1, 4, 792, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3207 = SCVTFv4f16
10328 { 3481, 2, 1, 4, 755, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3481 = SQABSv1i64
10330 { 3483, 2, 1, 4, 524, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3483 = SQABSv2i32
10332 { 3485, 2, 1, 4, 524, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3485 = SQABSv4i16
10335 { 3488, 2, 1, 4, 524, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3488 = SQABSv8i8
10505 { 3658, 2, 1, 4, 525, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3658 = SQNEGv1i64
10507 { 3660, 2, 1, 4, 507, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3660 = SQNEGv2i32
10509 { 3662, 2, 1, 4, 507, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3662 = SQNEGv4i16
10512 { 3665, 2, 1, 4, 507, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #3665 = SQNEGv8i8
11491 { 4644, 2, 1, 4, 494, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #4644 = UADDLPv2i32_v1i64
11492 { 4645, 2, 1, 4, 494, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #4645 = UADDLPv4i16_v2i32
11495 { 4648, 2, 1, 4, 494, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #4648 = UADDLPv8i8_v4i16
11552 { 4705, 2, 1, 4, 793, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #4705 = UCVTFv1i64
11553 { 4706, 2, 1, 4, 793, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #4706 = UCVTFv2f32
11557 { 4710, 2, 1, 4, 792, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #4710 = UCVTFv4f16
11936 { 5089, 2, 1, 4, 269, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #5089 = URECPEv2i32
11977 { 5130, 2, 1, 4, 457, 0, 0x1ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #5130 = URSQRTEv2i32