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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc 9296 { 2449, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #2449 = LDNT1B_ZZR_D_REAL
9297 { 2450, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #2450 = LDNT1B_ZZR_S_REAL
9300 { 2453, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #2453 = LDNT1D_ZZR_D_REAL
9303 { 2456, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #2456 = LDNT1H_ZZR_D_REAL
9304 { 2457, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #2457 = LDNT1H_ZZR_S_REAL
9305 { 2458, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #2458 = LDNT1SB_ZZR_D_REAL
9306 { 2459, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #2459 = LDNT1SB_ZZR_S_REAL
9307 { 2460, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #2460 = LDNT1SH_ZZR_D_REAL
9308 { 2461, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #2461 = LDNT1SH_ZZR_S_REAL
9309 { 2462, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #2462 = LDNT1SW_ZZR_D_REAL
9312 { 2465, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #2465 = LDNT1W_ZZR_D_REAL
9313 { 2466, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #2466 = LDNT1W_ZZR_S_REAL
11149 { 4302, 4, 0, 4, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #4302 = STNT1B_ZZR_D_REAL
11150 { 4303, 4, 0, 4, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #4303 = STNT1B_ZZR_S_REAL
11153 { 4306, 4, 0, 4, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #4306 = STNT1D_ZZR_D_REAL
11156 { 4309, 4, 0, 4, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #4309 = STNT1H_ZZR_D_REAL
11157 { 4310, 4, 0, 4, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #4310 = STNT1H_ZZR_S_REAL
11160 { 4313, 4, 0, 4, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #4313 = STNT1W_ZZR_D_REAL
11161 { 4314, 4, 0, 4, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #4314 = STNT1W_ZZR_S_REAL