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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc 9017 { 2170, 4, 2, 4, 143, 0|(1ULL<<MCID::MayLoad), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #2170 = LD1Twov1d_POST
9021 { 2174, 4, 2, 4, 143, 0|(1ULL<<MCID::MayLoad), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #2174 = LD1Twov2s_POST
9023 { 2176, 4, 2, 4, 143, 0|(1ULL<<MCID::MayLoad), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #2176 = LD1Twov4h_POST
9027 { 2180, 4, 2, 4, 143, 0|(1ULL<<MCID::MayLoad), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #2180 = LD1Twov8b_POST
9051 { 2204, 4, 2, 4, 155, 0|(1ULL<<MCID::MayLoad), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #2204 = LD2Rv1d_POST
9055 { 2208, 4, 2, 4, 153, 0|(1ULL<<MCID::MayLoad), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #2208 = LD2Rv2s_POST
9057 { 2210, 4, 2, 4, 153, 0|(1ULL<<MCID::MayLoad), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #2210 = LD2Rv4h_POST
9061 { 2214, 4, 2, 4, 153, 0|(1ULL<<MCID::MayLoad), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #2214 = LD2Rv8b_POST
9069 { 2222, 4, 2, 4, 62, 0|(1ULL<<MCID::MayLoad), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #2222 = LD2Twov2s_POST
9071 { 2224, 4, 2, 4, 62, 0|(1ULL<<MCID::MayLoad), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #2224 = LD2Twov4h_POST
9075 { 2228, 4, 2, 4, 62, 0|(1ULL<<MCID::MayLoad), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #2228 = LD2Twov8b_POST
10998 { 4151, 4, 1, 4, 187, 0|(1ULL<<MCID::MayStore), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #4151 = ST1Twov1d_POST
11002 { 4155, 4, 1, 4, 187, 0|(1ULL<<MCID::MayStore), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #4155 = ST1Twov2s_POST
11004 { 4157, 4, 1, 4, 187, 0|(1ULL<<MCID::MayStore), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #4157 = ST1Twov4h_POST
11008 { 4161, 4, 1, 4, 187, 0|(1ULL<<MCID::MayStore), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #4161 = ST1Twov8b_POST
11037 { 4190, 4, 1, 4, 94, 0|(1ULL<<MCID::MayStore), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #4190 = ST2Twov2s_POST
11039 { 4192, 4, 1, 4, 94, 0|(1ULL<<MCID::MayStore), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #4192 = ST2Twov4h_POST
11043 { 4196, 4, 1, 4, 94, 0|(1ULL<<MCID::MayStore), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #4196 = ST2Twov8b_POST