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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc 7908 { 1061, 5, 1, 4, 1, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #1061 = FCMLAv2f64
7911 { 1064, 5, 1, 4, 1, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #1064 = FCMLAv4f32
7913 { 1066, 5, 1, 4, 1, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #1066 = FCMLAv8f16
8330 { 1483, 5, 1, 4, 109, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #1483 = FMLAL2lanev8f16
8338 { 1491, 5, 1, 4, 109, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #1491 = FMLALlanev8f16
8353 { 1506, 5, 1, 4, 455, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #1506 = FMLAv2i64_indexed
8357 { 1510, 5, 1, 4, 260, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #1510 = FMLAv4i32_indexed
8361 { 1514, 5, 1, 4, 109, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #1514 = FMLSL2lanev8f16
8369 { 1522, 5, 1, 4, 109, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #1522 = FMLSLlanev8f16
8384 { 1537, 5, 1, 4, 455, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #1537 = FMLSv2i64_indexed
8388 { 1541, 5, 1, 4, 260, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #1541 = FMLSv4i32_indexed
9593 { 2746, 5, 1, 4, 221, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #2746 = MLAv4i32_indexed
9610 { 2763, 5, 1, 4, 221, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #2763 = MLSv4i32_indexed
10070 { 3223, 5, 1, 4, 848, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #3223 = SDOTlanev16i8
10161 { 3314, 5, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #3314 = SM3TT1A
10162 { 3315, 5, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #3315 = SM3TT1B
10163 { 3316, 5, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #3316 = SM3TT2A
10164 { 3317, 5, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #3317 = SM3TT2B
10252 { 3405, 5, 1, 4, 223, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #3405 = SMLALv4i32_indexed
10272 { 3425, 5, 1, 4, 223, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #3425 = SMLSLv4i32_indexed
10406 { 3559, 5, 1, 4, 555, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #3559 = SQDMLALv4i32_indexed
10431 { 3584, 5, 1, 4, 555, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #3584 = SQDMLSLv4i32_indexed
10535 { 3688, 5, 1, 4, 551, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #3688 = SQRDMLAHv4i32_indexed
10554 { 3707, 5, 1, 4, 551, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #3707 = SQRDMLSHv4i32_indexed
11574 { 4727, 5, 1, 4, 848, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #4727 = UDOTlanev16i8
11684 { 4837, 5, 1, 4, 223, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #4837 = UMLALv4i32_indexed
11704 { 4857, 5, 1, 4, 223, 0, 0x1ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #4857 = UMLSLv4i32_indexed