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reference to multiple definitions → definitions
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References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
16241   { 2671 /* ldrh */, AArch64::LDURHHi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB161_3, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB16, MCK__93_ }, },
16401   { 3251 /* ldurh */, AArch64::LDURHHi, Convert__Reg1_0__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
16402   { 3251 /* ldurh */, AArch64::LDURHHi, Convert__Reg1_0__Reg1_2__SImm91_3, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, },
23599   { 2671 /* ldrh */, AArch64::LDURHHi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB161_3, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB16, MCK__93_ }, },
23759   { 3251 /* ldurh */, AArch64::LDURHHi, Convert__Reg1_0__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
23760   { 3251 /* ldurh */, AArch64::LDURHHi, Convert__Reg1_0__Reg1_2__SImm91_3, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc
21874   case AArch64::LDURHHi:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
22590   case AArch64::LDURHHi:
gen/lib/Target/AArch64/AArch64GenDAGISel.inc
84036 /*194788*/          OPC_MorphNodeTo1, TARGET_VAL(AArch64::LDURHHi), 0|OPFL_Chain|OPFL_MemRefs,
84136 /*194977*/          OPC_MorphNodeTo1, TARGET_VAL(AArch64::LDURHHi), 0|OPFL_Chain|OPFL_MemRefs,
84164 /*195031*/            OPC_MorphNodeTo1, TARGET_VAL(AArch64::LDURHHi), 0|OPFL_Chain|OPFL_MemRefs,
84310 /*195372*/          OPC_EmitNode1, TARGET_VAL(AArch64::LDURHHi), 0|OPFL_Chain|OPFL_MemRefs,
84362 /*195500*/          OPC_EmitNode1, TARGET_VAL(AArch64::LDURHHi), 0|OPFL_Chain|OPFL_MemRefs,
84410 /*195620*/          OPC_EmitNode1, TARGET_VAL(AArch64::LDURHHi), 0|OPFL_Chain|OPFL_MemRefs,
92144 /*209979*/        OPC_MorphNodeTo1, TARGET_VAL(AArch64::LDURHHi), 0|OPFL_Chain|OPFL_MemRefs,
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc
13578       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURHHi,
13686       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURHHi,
14286       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::LDURHHi,
15452       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURHHi,
15503       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURHHi,
15786       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::LDURHHi,
15886       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::LDURHHi,
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
11939     case AArch64::LDURHHi:
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
  547   case AArch64::LDURHHi:
lib/Target/AArch64/AArch64FastISel.cpp
 1826     { { AArch64::LDURBBi,   AArch64::LDURHHi,   AArch64::LDURWi,
 1828       { AArch64::LDURBBi,   AArch64::LDURHHi,   AArch64::LDURWi,
 4481   case AArch64::LDURHHi:
lib/Target/AArch64/AArch64InstrInfo.cpp
 1734   case AArch64::LDURHHi:
 1754   case AArch64::LDRHHui: return AArch64::LDURHHi;
 2087   case AArch64::LDURHHi:
lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
  231   case AArch64::LDURHHi:
  397   case AArch64::LDURHHi:
  653   case AArch64::LDURHHi:
lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
 1167   case AArch64::LDURHHi: