reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
16063   { 2588 /* ldnt1b */, AArch64::LDNT1B_ZZR_S_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__regXZR, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK__93_ }, },
16067   { 2588 /* ldnt1b */, AArch64::LDNT1B_ZZR_S_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__regXZR, AMFBS_HasSVE2, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK__93_ }, },
16069   { 2588 /* ldnt1b */, AArch64::LDNT1B_ZZR_S_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__Reg1_6, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_GPR64, MCK__93_ }, },
16073   { 2588 /* ldnt1b */, AArch64::LDNT1B_ZZR_S_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__Reg1_6, AMFBS_HasSVE2, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_GPR64, MCK__93_ }, },
23421   { 2588 /* ldnt1b */, AArch64::LDNT1B_ZZR_S_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__regXZR, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK__93_ }, },
23425   { 2588 /* ldnt1b */, AArch64::LDNT1B_ZZR_S_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__regXZR, AMFBS_HasSVE2, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK__93_ }, },
23427   { 2588 /* ldnt1b */, AArch64::LDNT1B_ZZR_S_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__Reg1_6, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_GPR64, MCK__93_ }, },
23431   { 2588 /* ldnt1b */, AArch64::LDNT1B_ZZR_S_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__Reg1_6, AMFBS_HasSVE2, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_GPR64, MCK__93_ }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc
20419   case AArch64::LDNT1B_ZZR_S_REAL:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
21135   case AArch64::LDNT1B_ZZR_S_REAL:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
 6197     case AArch64::LDNT1B_ZZR_S_REAL: