|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc16064 { 2588 /* ldnt1b */, AArch64::LDNT1B_ZZR_D_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__regXZR, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK__93_ }, },
16068 { 2588 /* ldnt1b */, AArch64::LDNT1B_ZZR_D_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__regXZR, AMFBS_HasSVE2, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK__93_ }, },
16070 { 2588 /* ldnt1b */, AArch64::LDNT1B_ZZR_D_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__Reg1_6, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_GPR64, MCK__93_ }, },
16074 { 2588 /* ldnt1b */, AArch64::LDNT1B_ZZR_D_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__Reg1_6, AMFBS_HasSVE2, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_GPR64, MCK__93_ }, },
23422 { 2588 /* ldnt1b */, AArch64::LDNT1B_ZZR_D_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__regXZR, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK__93_ }, },
23426 { 2588 /* ldnt1b */, AArch64::LDNT1B_ZZR_D_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__regXZR, AMFBS_HasSVE2, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK__93_ }, },
23428 { 2588 /* ldnt1b */, AArch64::LDNT1B_ZZR_D_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__Reg1_6, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_GPR64, MCK__93_ }, },
23432 { 2588 /* ldnt1b */, AArch64::LDNT1B_ZZR_D_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__Reg1_6, AMFBS_HasSVE2, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_GPR64, MCK__93_ }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc20404 case AArch64::LDNT1B_ZZR_D_REAL:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc21120 case AArch64::LDNT1B_ZZR_D_REAL:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc 6196 case AArch64::LDNT1B_ZZR_D_REAL: