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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc15992 { 2531 /* ldnf1b */, AArch64::LDNF1B_IMM, Convert__SVEVectorBReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15993 { 2531 /* ldnf1b */, AArch64::LDNF1B_IMM, Convert__SVEVectorList181_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList18, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
16000 { 2531 /* ldnf1b */, AArch64::LDNF1B_IMM, Convert__SVEVectorBReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s11_6, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
16001 { 2531 /* ldnf1b */, AArch64::LDNF1B_IMM, Convert__SVEVectorList181_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s11_6, AMFBS_HasSVE, { MCK_SVEVectorList18, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
23350 { 2531 /* ldnf1b */, AArch64::LDNF1B_IMM, Convert__SVEVectorBReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
23351 { 2531 /* ldnf1b */, AArch64::LDNF1B_IMM, Convert__SVEVectorList181_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList18, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
23358 { 2531 /* ldnf1b */, AArch64::LDNF1B_IMM, Convert__SVEVectorBReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s11_6, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
23359 { 2531 /* ldnf1b */, AArch64::LDNF1B_IMM, Convert__SVEVectorList181_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s11_6, AMFBS_HasSVE, { MCK_SVEVectorList18, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc20089 case AArch64::LDNF1B_IMM:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc20805 case AArch64::LDNF1B_IMM:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc 6451 case AArch64::LDNF1B_IMM: