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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc15823 { 2464 /* ldff1h */, AArch64::LDFF1H_D_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__regXZR, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15828 { 2464 /* ldff1h */, AArch64::LDFF1H_D_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__regXZR, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15837 { 2464 /* ldff1h */, AArch64::LDFF1H_D_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
15852 { 2464 /* ldff1h */, AArch64::LDFF1H_D_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
23181 { 2464 /* ldff1h */, AArch64::LDFF1H_D_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__regXZR, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
23186 { 2464 /* ldff1h */, AArch64::LDFF1H_D_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__regXZR, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
23195 { 2464 /* ldff1h */, AArch64::LDFF1H_D_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
23210 { 2464 /* ldff1h */, AArch64::LDFF1H_D_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc19878 case AArch64::LDFF1H_D_REAL:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc20594 case AArch64::LDFF1H_D_REAL:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc15247 case AArch64::LDFF1H_D_REAL: