reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
15800   { 2457 /* ldff1d */, AArch64::LDFF1D_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__regXZR, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15802   { 2457 /* ldff1d */, AArch64::LDFF1D_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__regXZR, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15804   { 2457 /* ldff1d */, AArch64::LDFF1D_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted641_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted64, MCK__93_ }, },
15812   { 2457 /* ldff1d */, AArch64::LDFF1D_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted641_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted64, MCK__93_ }, },
23158   { 2457 /* ldff1d */, AArch64::LDFF1D_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__regXZR, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
23160   { 2457 /* ldff1d */, AArch64::LDFF1D_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__regXZR, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
23162   { 2457 /* ldff1d */, AArch64::LDFF1D_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted641_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted64, MCK__93_ }, },
23170   { 2457 /* ldff1d */, AArch64::LDFF1D_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted641_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted64, MCK__93_ }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc
19863   case AArch64::LDFF1D_REAL:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
20579   case AArch64::LDFF1D_REAL:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
15246     case AArch64::LDFF1D_REAL: