reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
15657   { 2051 /* ld4r */, AArch64::LD4Rv2s_POST, Convert__Reg1_2__TypedVectorList4_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
15658   { 2051 /* ld4r */, AArch64::LD4Rv2s_POST, Convert__Reg1_2__TypedVectorList4_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList4_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15673   { 2051 /* ld4r */, AArch64::LD4Rv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
15674   { 2051 /* ld4r */, AArch64::LD4Rv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
23015   { 2051 /* ld4r */, AArch64::LD4Rv2s_POST, Convert__Reg1_2__TypedVectorList4_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
23016   { 2051 /* ld4r */, AArch64::LD4Rv2s_POST, Convert__Reg1_2__TypedVectorList4_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList4_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
23031   { 2051 /* ld4r */, AArch64::LD4Rv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
23032   { 2051 /* ld4r */, AArch64::LD4Rv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc
19232   case AArch64::LD4Rv2s_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
19948   case AArch64::LD4Rv2s_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
12782     case AArch64::LD4Rv2s_POST:
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
  483   case AArch64::LD4Rv2s_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
 3861       SelectPostLoad(Node, 4, AArch64::LD4Rv2s_POST, AArch64::dsub0);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
  536   { AArch64::LD4Rv2s_POST,      "ld4r", ".2s",    1, false, 16 },