reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
15531   { 2022 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_12 }, },
15532   { 2022 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15547   { 2022 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_12 }, },
15548   { 2022 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22889   { 2022 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_12 }, },
22890   { 2022 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22905   { 2022 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_12 }, },
22906   { 2022 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc
18830   case AArch64::LD3Rv2s_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
19546   case AArch64::LD3Rv2s_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
12760     case AArch64::LD3Rv2s_POST:
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
  468   case AArch64::LD3Rv2s_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
 3833       SelectPostLoad(Node, 3, AArch64::LD3Rv2s_POST, AArch64::dsub0);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
  498   { AArch64::LD3Rv2s_POST,      "ld3r", ".2s",    1, false, 12 },