reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
15527   { 2022 /* ld3r */, AArch64::LD3Rv1d_POST, Convert__Reg1_2__TypedVectorList3_1641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_164, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
15528   { 2022 /* ld3r */, AArch64::LD3Rv1d_POST, Convert__Reg1_2__TypedVectorList3_1641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_164, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15543   { 2022 /* ld3r */, AArch64::LD3Rv1d_POST, Convert__Reg1_3__VecListThree641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
15544   { 2022 /* ld3r */, AArch64::LD3Rv1d_POST, Convert__Reg1_3__VecListThree641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22885   { 2022 /* ld3r */, AArch64::LD3Rv1d_POST, Convert__Reg1_2__TypedVectorList3_1641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_164, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
22886   { 2022 /* ld3r */, AArch64::LD3Rv1d_POST, Convert__Reg1_2__TypedVectorList3_1641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_164, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22901   { 2022 /* ld3r */, AArch64::LD3Rv1d_POST, Convert__Reg1_3__VecListThree641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
22902   { 2022 /* ld3r */, AArch64::LD3Rv1d_POST, Convert__Reg1_3__VecListThree641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc
18804   case AArch64::LD3Rv1d_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
19520   case AArch64::LD3Rv1d_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
12758     case AArch64::LD3Rv1d_POST:
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
  467   case AArch64::LD3Rv1d_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
 3839       SelectPostLoad(Node, 3, AArch64::LD3Rv1d_POST, AArch64::dsub0);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
  499   { AArch64::LD3Rv1d_POST,      "ld3r", ".1d",    1, false, 24 },