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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc14836 { 1854 /* ld1 */, AArch64::LD1Twov8b_POST, Convert__Reg1_2__TypedVectorList2_881_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_88, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
14837 { 1854 /* ld1 */, AArch64::LD1Twov8b_POST, Convert__Reg1_2__TypedVectorList2_881_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_88, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
14894 { 1854 /* ld1 */, AArch64::LD1Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
14895 { 1854 /* ld1 */, AArch64::LD1Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22194 { 1854 /* ld1 */, AArch64::LD1Twov8b_POST, Convert__Reg1_2__TypedVectorList2_881_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_88, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
22195 { 1854 /* ld1 */, AArch64::LD1Twov8b_POST, Convert__Reg1_2__TypedVectorList2_881_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_88, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22252 { 1854 /* ld1 */, AArch64::LD1Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
22253 { 1854 /* ld1 */, AArch64::LD1Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc18322 case AArch64::LD1Twov8b_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc19038 case AArch64::LD1Twov8b_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc12740 case AArch64::LD1Twov8b_POST:
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp 424 case AArch64::LD1Twov8b_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 3681 SelectPostLoad(Node, 2, AArch64::LD1Twov8b_POST, AArch64::dsub0);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 402 { AArch64::LD1Twov8b_POST, "ld1", ".8b", 1, false, 16 },