reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
14830   { 1854 /* ld1 */, AArch64::LD1Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
14831   { 1854 /* ld1 */, AArch64::LD1Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
14870   { 1854 /* ld1 */, AArch64::LD1Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
14871   { 1854 /* ld1 */, AArch64::LD1Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22188   { 1854 /* ld1 */, AArch64::LD1Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
22189   { 1854 /* ld1 */, AArch64::LD1Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22228   { 1854 /* ld1 */, AArch64::LD1Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
22229   { 1854 /* ld1 */, AArch64::LD1Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc
18283   case AArch64::LD1Twov2s_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
18999   case AArch64::LD1Twov2s_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
12737     case AArch64::LD1Twov2s_POST:
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
  422   case AArch64::LD1Twov2s_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
 3693       SelectPostLoad(Node, 2, AArch64::LD1Twov2s_POST, AArch64::dsub0);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
  404   { AArch64::LD1Twov2s_POST,    "ld1",  ".2s",    1, false, 16 },