|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc14824 { 1854 /* ld1 */, AArch64::LD1Twov16b_POST, Convert__Reg1_2__TypedVectorList2_1681_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_168, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
14825 { 1854 /* ld1 */, AArch64::LD1Twov16b_POST, Convert__Reg1_2__TypedVectorList2_1681_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_168, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
14846 { 1854 /* ld1 */, AArch64::LD1Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
14847 { 1854 /* ld1 */, AArch64::LD1Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22182 { 1854 /* ld1 */, AArch64::LD1Twov16b_POST, Convert__Reg1_2__TypedVectorList2_1681_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_168, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
22183 { 1854 /* ld1 */, AArch64::LD1Twov16b_POST, Convert__Reg1_2__TypedVectorList2_1681_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_168, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22204 { 1854 /* ld1 */, AArch64::LD1Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
22205 { 1854 /* ld1 */, AArch64::LD1Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc18244 case AArch64::LD1Twov16b_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc18960 case AArch64::LD1Twov16b_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc12734 case AArch64::LD1Twov16b_POST:
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp 428 case AArch64::LD1Twov16b_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 3684 SelectPostLoad(Node, 2, AArch64::LD1Twov16b_POST, AArch64::qsub0);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 398 { AArch64::LD1Twov16b_POST, "ld1", ".16b", 1, false, 32 },