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definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
14808   { 1854 /* ld1 */, AArch64::LD1Threev16b_POST, Convert__Reg1_2__TypedVectorList3_1681_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_168, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
14809   { 1854 /* ld1 */, AArch64::LD1Threev16b_POST, Convert__Reg1_2__TypedVectorList3_1681_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_168, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
14844   { 1854 /* ld1 */, AArch64::LD1Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
14845   { 1854 /* ld1 */, AArch64::LD1Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22166   { 1854 /* ld1 */, AArch64::LD1Threev16b_POST, Convert__Reg1_2__TypedVectorList3_1681_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_168, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
22167   { 1854 /* ld1 */, AArch64::LD1Threev16b_POST, Convert__Reg1_2__TypedVectorList3_1681_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_168, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22202   { 1854 /* ld1 */, AArch64::LD1Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
22203   { 1854 /* ld1 */, AArch64::LD1Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc
18140   case AArch64::LD1Threev16b_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
18856   case AArch64::LD1Threev16b_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
12726     case AArch64::LD1Threev16b_POST:
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
  436   case AArch64::LD1Threev16b_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
 3712       SelectPostLoad(Node, 3, AArch64::LD1Threev16b_POST, AArch64::qsub0);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
  414   { AArch64::LD1Threev16b_POST, "ld1",  ".16b",   1, false, 48 },