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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc15058 { 1873 /* ld1r */, AArch64::LD1Rv4h_POST, Convert__Reg1_2__TypedVectorList1_4161_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList1_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_2 }, },
15059 { 1873 /* ld1r */, AArch64::LD1Rv4h_POST, Convert__Reg1_2__TypedVectorList1_4161_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList1_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15074 { 1873 /* ld1r */, AArch64::LD1Rv4h_POST, Convert__Reg1_3__VecListOne641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_2 }, },
15075 { 1873 /* ld1r */, AArch64::LD1Rv4h_POST, Convert__Reg1_3__VecListOne641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22416 { 1873 /* ld1r */, AArch64::LD1Rv4h_POST, Convert__Reg1_2__TypedVectorList1_4161_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList1_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_2 }, },
22417 { 1873 /* ld1r */, AArch64::LD1Rv4h_POST, Convert__Reg1_2__TypedVectorList1_4161_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList1_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22432 { 1873 /* ld1r */, AArch64::LD1Rv4h_POST, Convert__Reg1_3__VecListOne641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_2 }, },
22433 { 1873 /* ld1r */, AArch64::LD1Rv4h_POST, Convert__Reg1_3__VecListOne641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc17992 case AArch64::LD1Rv4h_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc18708 case AArch64::LD1Rv4h_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc12722 case AArch64::LD1Rv4h_POST:
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp 409 case AArch64::LD1Rv4h_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 3771 SelectPostLoad(Node, 1, AArch64::LD1Rv4h_POST, AArch64::dsub0);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 371 { AArch64::LD1Rv4h_POST, "ld1r", ".4h", 1, false, 2 },