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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc15054 { 1873 /* ld1r */, AArch64::LD1Rv2d_POST, Convert__Reg1_2__TypedVectorList1_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList1_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_8 }, },
15055 { 1873 /* ld1r */, AArch64::LD1Rv2d_POST, Convert__Reg1_2__TypedVectorList1_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList1_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15070 { 1873 /* ld1r */, AArch64::LD1Rv2d_POST, Convert__Reg1_3__VecListOne1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_8 }, },
15071 { 1873 /* ld1r */, AArch64::LD1Rv2d_POST, Convert__Reg1_3__VecListOne1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22412 { 1873 /* ld1r */, AArch64::LD1Rv2d_POST, Convert__Reg1_2__TypedVectorList1_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList1_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_8 }, },
22413 { 1873 /* ld1r */, AArch64::LD1Rv2d_POST, Convert__Reg1_2__TypedVectorList1_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList1_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22428 { 1873 /* ld1r */, AArch64::LD1Rv2d_POST, Convert__Reg1_3__VecListOne1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_8 }, },
22429 { 1873 /* ld1r */, AArch64::LD1Rv2d_POST, Convert__Reg1_3__VecListOne1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc17966 case AArch64::LD1Rv2d_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc18682 case AArch64::LD1Rv2d_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc12720 case AArch64::LD1Rv2d_POST:
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp 411 case AArch64::LD1Rv2d_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 3786 SelectPostLoad(Node, 1, AArch64::LD1Rv2d_POST, AArch64::qsub0);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 369 { AArch64::LD1Rv2d_POST, "ld1r", ".2d", 1, false, 8 },