reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
15126   { 1910 /* ld1rqh */, AArch64::LD1RQ_H_IMM, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15127   { 1910 /* ld1rqh */, AArch64::LD1RQ_H_IMM, Convert__SVEVectorList1161_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList116, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15129   { 1910 /* ld1rqh */, AArch64::LD1RQ_H_IMM, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s161_6, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s16, MCK__93_ }, },
15131   { 1910 /* ld1rqh */, AArch64::LD1RQ_H_IMM, Convert__SVEVectorList1161_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s161_6, AMFBS_HasSVE, { MCK_SVEVectorList116, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s16, MCK__93_ }, },
22484   { 1910 /* ld1rqh */, AArch64::LD1RQ_H_IMM, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22485   { 1910 /* ld1rqh */, AArch64::LD1RQ_H_IMM, Convert__SVEVectorList1161_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList116, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22487   { 1910 /* ld1rqh */, AArch64::LD1RQ_H_IMM, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s161_6, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s16, MCK__93_ }, },
22489   { 1910 /* ld1rqh */, AArch64::LD1RQ_H_IMM, Convert__SVEVectorList1161_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s161_6, AMFBS_HasSVE, { MCK_SVEVectorList116, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s16, MCK__93_ }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc
17780   case AArch64::LD1RQ_H_IMM:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
18496   case AArch64::LD1RQ_H_IMM:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
15343     case AArch64::LD1RQ_H_IMM: