reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
15114   { 1896 /* ld1rqb */, AArch64::LD1RQ_B_IMM, Convert__SVEVectorBReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15115   { 1896 /* ld1rqb */, AArch64::LD1RQ_B_IMM, Convert__SVEVectorList181_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList18, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15117   { 1896 /* ld1rqb */, AArch64::LD1RQ_B_IMM, Convert__SVEVectorBReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s161_6, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s16, MCK__93_ }, },
15119   { 1896 /* ld1rqb */, AArch64::LD1RQ_B_IMM, Convert__SVEVectorList181_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s161_6, AMFBS_HasSVE, { MCK_SVEVectorList18, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s16, MCK__93_ }, },
22472   { 1896 /* ld1rqb */, AArch64::LD1RQ_B_IMM, Convert__SVEVectorBReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22473   { 1896 /* ld1rqb */, AArch64::LD1RQ_B_IMM, Convert__SVEVectorList181_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList18, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22475   { 1896 /* ld1rqb */, AArch64::LD1RQ_B_IMM, Convert__SVEVectorBReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s161_6, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s16, MCK__93_ }, },
22477   { 1896 /* ld1rqb */, AArch64::LD1RQ_B_IMM, Convert__SVEVectorList181_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s161_6, AMFBS_HasSVE, { MCK_SVEVectorList18, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s16, MCK__93_ }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc
17748   case AArch64::LD1RQ_B_IMM:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
18464   case AArch64::LD1RQ_B_IMM:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
15341     case AArch64::LD1RQ_B_IMM: