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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc14989 { 1868 /* ld1h */, AArch64::LD1H_S_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
14994 { 1868 /* ld1h */, AArch64::LD1H_S_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15029 { 1868 /* ld1h */, AArch64::LD1H_S_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s11_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
15032 { 1868 /* ld1h */, AArch64::LD1H_S_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s11_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
22347 { 1868 /* ld1h */, AArch64::LD1H_S_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22352 { 1868 /* ld1h */, AArch64::LD1H_S_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22387 { 1868 /* ld1h */, AArch64::LD1H_S_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s11_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
22390 { 1868 /* ld1h */, AArch64::LD1H_S_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s11_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc17500 case AArch64::LD1H_S_IMM:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc18216 case AArch64::LD1H_S_IMM:
gen/lib/Target/AArch64/AArch64GenDAGISel.inc111759 /*249502*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::LD1H_S_IMM), 0|OPFL_Chain|OPFL_MemRefs,
111791 /*249571*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::LD1H_S_IMM), 0|OPFL_Chain|OPFL_MemRefs,
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc 6440 case AArch64::LD1H_S_IMM: