reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
14784   { 1854 /* ld1 */, AArch64::LD1Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_881_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_88, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
14785   { 1854 /* ld1 */, AArch64::LD1Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_881_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList4_88, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
14888   { 1854 /* ld1 */, AArch64::LD1Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
14889   { 1854 /* ld1 */, AArch64::LD1Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22142   { 1854 /* ld1 */, AArch64::LD1Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_881_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_88, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
22143   { 1854 /* ld1 */, AArch64::LD1Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_881_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList4_88, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22246   { 1854 /* ld1 */, AArch64::LD1Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
22247   { 1854 /* ld1 */, AArch64::LD1Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc
17442   case AArch64::LD1Fourv8b_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
18158   case AArch64::LD1Fourv8b_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
12708     case AArch64::LD1Fourv8b_POST:
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
  440   case AArch64::LD1Fourv8b_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
 3737       SelectPostLoad(Node, 4, AArch64::LD1Fourv8b_POST, AArch64::dsub0);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
  434   { AArch64::LD1Fourv8b_POST,   "ld1",  ".8b",    1, false, 32 },