reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
14776   { 1854 /* ld1 */, AArch64::LD1Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_64 }, },
14777   { 1854 /* ld1 */, AArch64::LD1Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList4_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
14856   { 1854 /* ld1 */, AArch64::LD1Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_64 }, },
14857   { 1854 /* ld1 */, AArch64::LD1Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22134   { 1854 /* ld1 */, AArch64::LD1Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_64 }, },
22135   { 1854 /* ld1 */, AArch64::LD1Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList4_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22214   { 1854 /* ld1 */, AArch64::LD1Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_64 }, },
22215   { 1854 /* ld1 */, AArch64::LD1Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc
17390   case AArch64::LD1Fourv2d_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
18106   case AArch64::LD1Fourv2d_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
12704     case AArch64::LD1Fourv2d_POST:
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
  441   case AArch64::LD1Fourv2d_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
 3758       SelectPostLoad(Node, 4, AArch64::LD1Fourv2d_POST, AArch64::qsub0);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
  433   { AArch64::LD1Fourv2d_POST,   "ld1",  ".2d",    1, false, 64 },