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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc 7131 { 284, 2, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList2, ImplicitList2, OperandInfo8, -1 ,nullptr }, // Inst #284 = ADJCALLSTACKDOWN
7131 { 284, 2, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList2, ImplicitList2, OperandInfo8, -1 ,nullptr }, // Inst #284 = ADJCALLSTACKDOWN
7132 { 285, 2, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList2, ImplicitList2, OperandInfo8, -1 ,nullptr }, // Inst #285 = ADJCALLSTACKUP
7132 { 285, 2, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList2, ImplicitList2, OperandInfo8, -1 ,nullptr }, // Inst #285 = ADJCALLSTACKUP
7272 { 425, 1, 0, 4, 117, 0|(1ULL<<MCID::Call), 0x1ULL, ImplicitList2, ImplicitList6, OperandInfo90, -1 ,nullptr }, // Inst #425 = BL
7273 { 426, 1, 0, 4, 118, 0|(1ULL<<MCID::Call), 0x1ULL, ImplicitList2, ImplicitList6, OperandInfo89, -1 ,nullptr }, // Inst #426 = BLR
11395 { 4548, 2, 0, 0, 619, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo8, -1 ,nullptr }, // Inst #4548 = TCRETURNdi
11396 { 4549, 2, 0, 0, 622, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #4549 = TCRETURNri
11397 { 4550, 2, 0, 0, 11, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList2, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #4550 = TCRETURNriALL
11398 { 4551, 2, 0, 0, 11, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #4551 = TCRETURNriBTI