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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc13519 { 975 /* eor */, AArch64::EORv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, AMFBS_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, },
20874 { 975 /* eor */, AArch64::EORv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, AMFBS_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, },
gen/lib/Target/AArch64/AArch64GenDAGISel.inc88881 /*204373*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::EORv8i8), 0,
88893 /*204397*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::EORv8i8), 0,
88899 /*204409*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::EORv8i8), 0,
88905 /*204421*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::EORv8i8), 0,
gen/lib/Target/AArch64/AArch64GenFastISel.inc 7614 return fastEmitInst_rr(AArch64::EORv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
7632 return fastEmitInst_rr(AArch64::EORv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
7650 return fastEmitInst_rr(AArch64::EORv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
7668 return fastEmitInst_rr(AArch64::EORv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc 7143 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv8i8,
7160 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv8i8,
7190 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv8i8,
7220 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv8i8,
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc 8466 case AArch64::EORv8i8:
lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp 176 return AArch64::EORv8i8;