|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc13518 { 975 /* eor */, AArch64::EORv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, },
20873 { 975 /* eor */, AArch64::EORv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, },
gen/lib/Target/AArch64/AArch64GenDAGISel.inc88887 /*204385*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::EORv16i8), 0,
88911 /*204433*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::EORv16i8), 0,
88917 /*204445*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::EORv16i8), 0,
88923 /*204457*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::EORv16i8), 0,
gen/lib/Target/AArch64/AArch64GenFastISel.inc 7623 return fastEmitInst_rr(AArch64::EORv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
7641 return fastEmitInst_rr(AArch64::EORv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
7659 return fastEmitInst_rr(AArch64::EORv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
7677 return fastEmitInst_rr(AArch64::EORv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc 7175 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv16i8,
7205 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv16i8,
7235 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv16i8,
7250 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv16i8,
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc 8465 case AArch64::EORv16i8:
lib/Target/AArch64/AArch64MacroFusion.cpp 134 if (SecondMI.getOpcode() != AArch64::EORv16i8)