|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc12916 { 288 /* bic */, AArch64::BICXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, },
12931 { 288 /* bic */, AArch64::BICXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, },
20274 { 288 /* bic */, AArch64::BICXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, },
20295 { 288 /* bic */, AArch64::BICXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc15357 case AArch64::BICXrs:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc16073 case AArch64::BICXrs:
gen/lib/Target/AArch64/AArch64GenDAGISel.inc85270 /*197360*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::BICXrs), 0,
85290 /*197411*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::BICXrs), 0,
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc 5769 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::BICXrs,
5789 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::BICXrs,
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc18097 case AArch64::BICXrs:
18154 case AArch64::BICXrs:
18383 case AArch64::BICXrs:
29835 case AArch64::BICXrs:
29892 case AArch64::BICXrs:
30121 case AArch64::BICXrs:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc15465 case AArch64::BICXrs:
lib/Target/AArch64/AArch64CondBrTuning.cpp 222 case AArch64::BICXrs:
lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp 451 case AArch64::BICXrr: Opcode = AArch64::BICXrs; break;
lib/Target/AArch64/AArch64InstrInfo.cpp 1907 case AArch64::BICXrs:
lib/Target/AArch64/AArch64MacroFusion.cpp 105 case AArch64::BICXrs:
304 case AArch64::BICXrs:
lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp 980 case AArch64::BICXrs: