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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc12914 { 288 /* bic */, AArch64::BICWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, },
12930 { 288 /* bic */, AArch64::BICWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
20272 { 288 /* bic */, AArch64::BICWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, },
20294 { 288 /* bic */, AArch64::BICWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc15342 case AArch64::BICWrs:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc16058 case AArch64::BICWrs:
gen/lib/Target/AArch64/AArch64GenDAGISel.inc85264 /*197346*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::BICWrs), 0,
85284 /*197397*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::BICWrs), 0,
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc 5575 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::BICWrs,
5595 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::BICWrs,
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc18096 case AArch64::BICWrs:
18153 case AArch64::BICWrs:
18382 case AArch64::BICWrs:
29834 case AArch64::BICWrs:
29891 case AArch64::BICWrs:
30120 case AArch64::BICWrs:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc15464 case AArch64::BICWrs:
lib/Target/AArch64/AArch64CondBrTuning.cpp 162 case AArch64::BICWrs:
lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp 450 case AArch64::BICWrr: Opcode = AArch64::BICWrs; break;
lib/Target/AArch64/AArch64InstrInfo.cpp 1867 case AArch64::BICWrs:
lib/Target/AArch64/AArch64MacroFusion.cpp 104 case AArch64::BICWrs:
303 case AArch64::BICWrs:
lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp 956 case AArch64::BICWrs: