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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc12812 { 120 /* and */, AArch64::ANDXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, },
12823 { 120 /* and */, AArch64::ANDXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, },
20170 { 120 /* and */, AArch64::ANDXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, },
20183 { 120 /* and */, AArch64::ANDXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc15252 case AArch64::ANDXrs:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc15968 case AArch64::ANDXrs:
gen/lib/Target/AArch64/AArch64GenDAGISel.inc85645 /*198185*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::ANDXrs), 0,
85651 /*198198*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::ANDXrs), 0,
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc 6002 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ANDXrs,
6016 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ANDXrs,
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc18093 case AArch64::ANDXrs:
18150 case AArch64::ANDXrs:
18379 case AArch64::ANDXrs:
29831 case AArch64::ANDXrs:
29888 case AArch64::ANDXrs:
30117 case AArch64::ANDXrs:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc15461 case AArch64::ANDXrs:
lib/Target/AArch64/AArch64CondBrTuning.cpp 220 case AArch64::ANDXrs:
lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp 449 case AArch64::ANDXrr: Opcode = AArch64::ANDXrs; break;
lib/Target/AArch64/AArch64FastISel.cpp 1744 { AArch64::ANDWrs, AArch64::ANDXrs },
lib/Target/AArch64/AArch64InstrInfo.cpp 1901 case AArch64::ANDXrs:
lib/Target/AArch64/AArch64MacroFusion.cpp 101 case AArch64::ANDXrs:
302 case AArch64::ANDXrs:
lib/Target/AArch64/AArch64SpeculationHardening.cpp 398 BuildMI(MBB, MBBI, DebugLoc(), TII->get(AArch64::ANDXrs))
576 Is64Bit ? TII->get(AArch64::ANDXrs) : TII->get(AArch64::ANDWrs))
lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp 978 case AArch64::ANDXrs: