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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc12810 { 120 /* and */, AArch64::ANDWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, },
12822 { 120 /* and */, AArch64::ANDWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
20168 { 120 /* and */, AArch64::ANDWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, },
20182 { 120 /* and */, AArch64::ANDWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc15237 case AArch64::ANDWrs:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc15953 case AArch64::ANDWrs:
gen/lib/Target/AArch64/AArch64GenDAGISel.inc85630 /*198154*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::ANDWrs), 0,
85636 /*198167*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::ANDWrs), 0,
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc 5678 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ANDWrs,
5692 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ANDWrs,
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc18092 case AArch64::ANDWrs:
18149 case AArch64::ANDWrs:
18378 case AArch64::ANDWrs:
29830 case AArch64::ANDWrs:
29887 case AArch64::ANDWrs:
30116 case AArch64::ANDWrs:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc15460 case AArch64::ANDWrs:
lib/Target/AArch64/AArch64CondBrTuning.cpp 160 case AArch64::ANDWrs:
lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp 448 case AArch64::ANDWrr: Opcode = AArch64::ANDWrs; break;
lib/Target/AArch64/AArch64FastISel.cpp 1744 { AArch64::ANDWrs, AArch64::ANDXrs },
lib/Target/AArch64/AArch64InstrInfo.cpp 1861 case AArch64::ANDWrs:
lib/Target/AArch64/AArch64MacroFusion.cpp 100 case AArch64::ANDWrs:
301 case AArch64::ANDWrs:
lib/Target/AArch64/AArch64SpeculationHardening.cpp 576 Is64Bit ? TII->get(AArch64::ANDXrs) : TII->get(AArch64::ANDWrs))
lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp 954 case AArch64::ANDWrs: