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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc10539 case MCK_ZPRExtendUXTW328Only: {
12177 case MCK_ZPRExtendUXTW328Only: return "MCK_ZPRExtendUXTW328Only";
14939 { 1858 /* ld1b */, AArch64::GLD1B_S_UXTW_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
14951 { 1858 /* ld1b */, AArch64::GLD1B_S_UXTW_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
15183 { 1951 /* ld1sb */, AArch64::GLD1SB_S_UXTW_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
15193 { 1951 /* ld1sb */, AArch64::GLD1SB_S_UXTW_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
15781 { 2450 /* ldff1b */, AArch64::GLDFF1B_S_UXTW_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
15793 { 2450 /* ldff1b */, AArch64::GLDFF1B_S_UXTW_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
15873 { 2471 /* ldff1sb */, AArch64::GLDFF1SB_S_UXTW_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
15883 { 2471 /* ldff1sb */, AArch64::GLDFF1SB_S_UXTW_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
16851 { 3668 /* prfb */, AArch64::PRFB_S_UXTW_SCALED, Convert__SVEPrefetch1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendUXTW328Only1_4, AMFBS_HasSVE, { MCK_SVEPrefetch, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
18274 { 5238 /* st1b */, AArch64::SST1B_S_UXTW, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendUXTW328Only1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
18286 { 5238 /* st1b */, AArch64::SST1B_S_UXTW, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendUXTW328Only1_4, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
22297 { 1858 /* ld1b */, AArch64::GLD1B_S_UXTW_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
22309 { 1858 /* ld1b */, AArch64::GLD1B_S_UXTW_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
22541 { 1951 /* ld1sb */, AArch64::GLD1SB_S_UXTW_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
22551 { 1951 /* ld1sb */, AArch64::GLD1SB_S_UXTW_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
23139 { 2450 /* ldff1b */, AArch64::GLDFF1B_S_UXTW_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
23151 { 2450 /* ldff1b */, AArch64::GLDFF1B_S_UXTW_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
23231 { 2471 /* ldff1sb */, AArch64::GLDFF1SB_S_UXTW_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
23241 { 2471 /* ldff1sb */, AArch64::GLDFF1SB_S_UXTW_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
24209 { 3668 /* prfb */, AArch64::PRFB_S_UXTW_SCALED, Convert__SVEPrefetch1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendUXTW328Only1_4, AMFBS_HasSVE, { MCK_SVEPrefetch, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
25632 { 5238 /* st1b */, AArch64::SST1B_S_UXTW, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendUXTW328Only1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
25644 { 5238 /* st1b */, AArch64::SST1B_S_UXTW, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendUXTW328Only1_4, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW328Only, MCK__93_ }, },
31067 { 1858 /* ld1b */, 64 /* 6 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
31070 { 1858 /* ld1b */, 64 /* 6 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
31135 { 1858 /* ld1b */, 64 /* 6 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
31138 { 1858 /* ld1b */, 64 /* 6 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
32003 { 1951 /* ld1sb */, 64 /* 6 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
32006 { 1951 /* ld1sb */, 64 /* 6 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
32059 { 1951 /* ld1sb */, 64 /* 6 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
32062 { 1951 /* ld1sb */, 64 /* 6 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
32943 { 2450 /* ldff1b */, 64 /* 6 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
32946 { 2450 /* ldff1b */, 64 /* 6 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
33011 { 2450 /* ldff1b */, 64 /* 6 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
33014 { 2450 /* ldff1b */, 64 /* 6 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
33447 { 2471 /* ldff1sb */, 64 /* 6 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
33450 { 2471 /* ldff1sb */, 64 /* 6 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
33503 { 2471 /* ldff1sb */, 64 /* 6 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
33506 { 2471 /* ldff1sb */, 64 /* 6 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
35434 { 3668 /* prfb */, 16 /* 4 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
35437 { 3668 /* prfb */, 16 /* 4 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
37723 { 5238 /* st1b */, 16 /* 4 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
37726 { 5238 /* st1b */, 16 /* 4 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
37791 { 5238 /* st1b */, 16 /* 4 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
37794 { 5238 /* st1b */, 16 /* 4 */, MCK_ZPRExtendUXTW328Only, AMFBS_HasSVE },
40755 case MCK_ZPRExtendUXTW328Only: