reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
10512   case MCK_ZPRExtendUXTW3232: {
12174   case MCK_ZPRExtendUXTW3232: return "MCK_ZPRExtendUXTW3232";
15279   { 1969 /* ld1w */, AArch64::GLD1W_UXTW_SCALED_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW32321_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW3232, MCK__93_ }, },
15293   { 1969 /* ld1w */, AArch64::GLD1W_UXTW_SCALED_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW32321_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW3232, MCK__93_ }, },
15957   { 2495 /* ldff1w */, AArch64::GLDFF1W_UXTW_SCALED_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW32321_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW3232, MCK__93_ }, },
15971   { 2495 /* ldff1w */, AArch64::GLDFF1W_UXTW_SCALED_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW32321_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW3232, MCK__93_ }, },
16895   { 3694 /* prfw */, AArch64::PRFW_S_UXTW_SCALED, Convert__SVEPrefetch1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendUXTW32321_4, AMFBS_HasSVE, { MCK_SVEPrefetch, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW3232, MCK__93_ }, },
18380   { 5253 /* st1w */, AArch64::SST1W_UXTW_SCALED, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendUXTW32321_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW3232, MCK__93_ }, },
18394   { 5253 /* st1w */, AArch64::SST1W_UXTW_SCALED, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendUXTW32321_4, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW3232, MCK__93_ }, },
22637   { 1969 /* ld1w */, AArch64::GLD1W_UXTW_SCALED_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW32321_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW3232, MCK__93_ }, },
22651   { 1969 /* ld1w */, AArch64::GLD1W_UXTW_SCALED_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW32321_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW3232, MCK__93_ }, },
23315   { 2495 /* ldff1w */, AArch64::GLDFF1W_UXTW_SCALED_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW32321_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW3232, MCK__93_ }, },
23329   { 2495 /* ldff1w */, AArch64::GLDFF1W_UXTW_SCALED_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendUXTW32321_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW3232, MCK__93_ }, },
24253   { 3694 /* prfw */, AArch64::PRFW_S_UXTW_SCALED, Convert__SVEPrefetch1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendUXTW32321_4, AMFBS_HasSVE, { MCK_SVEPrefetch, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW3232, MCK__93_ }, },
25738   { 5253 /* st1w */, AArch64::SST1W_UXTW_SCALED, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendUXTW32321_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW3232, MCK__93_ }, },
25752   { 5253 /* st1w */, AArch64::SST1W_UXTW_SCALED, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendUXTW32321_4, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendUXTW3232, MCK__93_ }, },
32515   { 1969 /* ld1w */, 64 /* 6 */, MCK_ZPRExtendUXTW3232, AMFBS_HasSVE },
32518   { 1969 /* ld1w */, 64 /* 6 */, MCK_ZPRExtendUXTW3232, AMFBS_HasSVE },
32595   { 1969 /* ld1w */, 64 /* 6 */, MCK_ZPRExtendUXTW3232, AMFBS_HasSVE },
32598   { 1969 /* ld1w */, 64 /* 6 */, MCK_ZPRExtendUXTW3232, AMFBS_HasSVE },
33911   { 2495 /* ldff1w */, 64 /* 6 */, MCK_ZPRExtendUXTW3232, AMFBS_HasSVE },
33914   { 2495 /* ldff1w */, 64 /* 6 */, MCK_ZPRExtendUXTW3232, AMFBS_HasSVE },
33991   { 2495 /* ldff1w */, 64 /* 6 */, MCK_ZPRExtendUXTW3232, AMFBS_HasSVE },
33994   { 2495 /* ldff1w */, 64 /* 6 */, MCK_ZPRExtendUXTW3232, AMFBS_HasSVE },
35654   { 3694 /* prfw */, 16 /* 4 */, MCK_ZPRExtendUXTW3232, AMFBS_HasSVE },
35657   { 3694 /* prfw */, 16 /* 4 */, MCK_ZPRExtendUXTW3232, AMFBS_HasSVE },
38283   { 5253 /* st1w */, 16 /* 4 */, MCK_ZPRExtendUXTW3232, AMFBS_HasSVE },
38286   { 5253 /* st1w */, 16 /* 4 */, MCK_ZPRExtendUXTW3232, AMFBS_HasSVE },
38363   { 5253 /* st1w */, 16 /* 4 */, MCK_ZPRExtendUXTW3232, AMFBS_HasSVE },
38366   { 5253 /* st1w */, 16 /* 4 */, MCK_ZPRExtendUXTW3232, AMFBS_HasSVE },
40749   case MCK_ZPRExtendUXTW3232: