reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
10467   case MCK_ZPRExtendSXTW3232: {
12169   case MCK_ZPRExtendSXTW3232: return "MCK_ZPRExtendSXTW3232";
15277   { 1969 /* ld1w */, AArch64::GLD1W_SXTW_SCALED_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW32321_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW3232, MCK__93_ }, },
15291   { 1969 /* ld1w */, AArch64::GLD1W_SXTW_SCALED_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW32321_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW3232, MCK__93_ }, },
15955   { 2495 /* ldff1w */, AArch64::GLDFF1W_SXTW_SCALED_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW32321_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW3232, MCK__93_ }, },
15969   { 2495 /* ldff1w */, AArch64::GLDFF1W_SXTW_SCALED_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW32321_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW3232, MCK__93_ }, },
16894   { 3694 /* prfw */, AArch64::PRFW_S_SXTW_SCALED, Convert__SVEPrefetch1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendSXTW32321_4, AMFBS_HasSVE, { MCK_SVEPrefetch, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW3232, MCK__93_ }, },
18378   { 5253 /* st1w */, AArch64::SST1W_SXTW_SCALED, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendSXTW32321_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW3232, MCK__93_ }, },
18392   { 5253 /* st1w */, AArch64::SST1W_SXTW_SCALED, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendSXTW32321_4, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW3232, MCK__93_ }, },
22635   { 1969 /* ld1w */, AArch64::GLD1W_SXTW_SCALED_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW32321_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW3232, MCK__93_ }, },
22649   { 1969 /* ld1w */, AArch64::GLD1W_SXTW_SCALED_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW32321_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW3232, MCK__93_ }, },
23313   { 2495 /* ldff1w */, AArch64::GLDFF1W_SXTW_SCALED_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW32321_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW3232, MCK__93_ }, },
23327   { 2495 /* ldff1w */, AArch64::GLDFF1W_SXTW_SCALED_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW32321_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW3232, MCK__93_ }, },
24252   { 3694 /* prfw */, AArch64::PRFW_S_SXTW_SCALED, Convert__SVEPrefetch1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendSXTW32321_4, AMFBS_HasSVE, { MCK_SVEPrefetch, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW3232, MCK__93_ }, },
25736   { 5253 /* st1w */, AArch64::SST1W_SXTW_SCALED, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendSXTW32321_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW3232, MCK__93_ }, },
25750   { 5253 /* st1w */, AArch64::SST1W_SXTW_SCALED, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendSXTW32321_4, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW3232, MCK__93_ }, },
32503   { 1969 /* ld1w */, 64 /* 6 */, MCK_ZPRExtendSXTW3232, AMFBS_HasSVE },
32506   { 1969 /* ld1w */, 64 /* 6 */, MCK_ZPRExtendSXTW3232, AMFBS_HasSVE },
32583   { 1969 /* ld1w */, 64 /* 6 */, MCK_ZPRExtendSXTW3232, AMFBS_HasSVE },
32586   { 1969 /* ld1w */, 64 /* 6 */, MCK_ZPRExtendSXTW3232, AMFBS_HasSVE },
33899   { 2495 /* ldff1w */, 64 /* 6 */, MCK_ZPRExtendSXTW3232, AMFBS_HasSVE },
33902   { 2495 /* ldff1w */, 64 /* 6 */, MCK_ZPRExtendSXTW3232, AMFBS_HasSVE },
33979   { 2495 /* ldff1w */, 64 /* 6 */, MCK_ZPRExtendSXTW3232, AMFBS_HasSVE },
33982   { 2495 /* ldff1w */, 64 /* 6 */, MCK_ZPRExtendSXTW3232, AMFBS_HasSVE },
35648   { 3694 /* prfw */, 16 /* 4 */, MCK_ZPRExtendSXTW3232, AMFBS_HasSVE },
35651   { 3694 /* prfw */, 16 /* 4 */, MCK_ZPRExtendSXTW3232, AMFBS_HasSVE },
38271   { 5253 /* st1w */, 16 /* 4 */, MCK_ZPRExtendSXTW3232, AMFBS_HasSVE },
38274   { 5253 /* st1w */, 16 /* 4 */, MCK_ZPRExtendSXTW3232, AMFBS_HasSVE },
38351   { 5253 /* st1w */, 16 /* 4 */, MCK_ZPRExtendSXTW3232, AMFBS_HasSVE },
38354   { 5253 /* st1w */, 16 /* 4 */, MCK_ZPRExtendSXTW3232, AMFBS_HasSVE },
40739   case MCK_ZPRExtendSXTW3232: