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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc10566 case MCK_ZPRExtendLSL6464: {
12180 case MCK_ZPRExtendLSL6464: return "MCK_ZPRExtendLSL6464";
12791 { 88 /* adr */, AArch64::ADR_LSL_ZZZ_D_3, Convert__SVEVectorDReg1_0__SVEVectorDReg1_2__ZPRExtendLSL64641_3, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK__91_, MCK_SVEVectorDReg, MCK_ZPRExtendLSL6464, MCK__93_ }, },
14971 { 1863 /* ld1d */, AArch64::GLD1D_SCALED_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendLSL64641_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendLSL6464, MCK__93_ }, },
14979 { 1863 /* ld1d */, AArch64::GLD1D_SCALED_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendLSL64641_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendLSL6464, MCK__93_ }, },
15805 { 2457 /* ldff1d */, AArch64::GLDFF1D_SCALED_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendLSL64641_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendLSL6464, MCK__93_ }, },
15813 { 2457 /* ldff1d */, AArch64::GLDFF1D_SCALED_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendLSL64641_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendLSL6464, MCK__93_ }, },
16864 { 3673 /* prfd */, AArch64::PRFD_D_SCALED, Convert__SVEPrefetch1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendLSL64641_4, AMFBS_HasSVE, { MCK_SVEPrefetch, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendLSL6464, MCK__93_ }, },
18306 { 5243 /* st1d */, AArch64::SST1D_SCALED, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendLSL64641_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendLSL6464, MCK__93_ }, },
18314 { 5243 /* st1d */, AArch64::SST1D_SCALED, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendLSL64641_4, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendLSL6464, MCK__93_ }, },
20149 { 88 /* adr */, AArch64::ADR_LSL_ZZZ_D_3, Convert__SVEVectorDReg1_0__SVEVectorDReg1_2__ZPRExtendLSL64641_3, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK__91_, MCK_SVEVectorDReg, MCK_ZPRExtendLSL6464, MCK__93_ }, },
22329 { 1863 /* ld1d */, AArch64::GLD1D_SCALED_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendLSL64641_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendLSL6464, MCK__93_ }, },
22337 { 1863 /* ld1d */, AArch64::GLD1D_SCALED_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendLSL64641_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendLSL6464, MCK__93_ }, },
23163 { 2457 /* ldff1d */, AArch64::GLDFF1D_SCALED_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendLSL64641_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendLSL6464, MCK__93_ }, },
23171 { 2457 /* ldff1d */, AArch64::GLDFF1D_SCALED_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendLSL64641_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendLSL6464, MCK__93_ }, },
24222 { 3673 /* prfd */, AArch64::PRFD_D_SCALED, Convert__SVEPrefetch1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendLSL64641_4, AMFBS_HasSVE, { MCK_SVEPrefetch, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendLSL6464, MCK__93_ }, },
25664 { 5243 /* st1d */, AArch64::SST1D_SCALED, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendLSL64641_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendLSL6464, MCK__93_ }, },
25672 { 5243 /* st1d */, AArch64::SST1D_SCALED, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendLSL64641_4, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendLSL6464, MCK__93_ }, },
27774 { 88 /* adr */, 8 /* 3 */, MCK_ZPRExtendLSL6464, AMFBS_HasSVE },
27776 { 88 /* adr */, 8 /* 3 */, MCK_ZPRExtendLSL6464, AMFBS_HasSVE },
31233 { 1863 /* ld1d */, 64 /* 6 */, MCK_ZPRExtendLSL6464, AMFBS_HasSVE },
31236 { 1863 /* ld1d */, 64 /* 6 */, MCK_ZPRExtendLSL6464, AMFBS_HasSVE },
31279 { 1863 /* ld1d */, 64 /* 6 */, MCK_ZPRExtendLSL6464, AMFBS_HasSVE },
31282 { 1863 /* ld1d */, 64 /* 6 */, MCK_ZPRExtendLSL6464, AMFBS_HasSVE },
33077 { 2457 /* ldff1d */, 64 /* 6 */, MCK_ZPRExtendLSL6464, AMFBS_HasSVE },
33080 { 2457 /* ldff1d */, 64 /* 6 */, MCK_ZPRExtendLSL6464, AMFBS_HasSVE },
33123 { 2457 /* ldff1d */, 64 /* 6 */, MCK_ZPRExtendLSL6464, AMFBS_HasSVE },
33126 { 2457 /* ldff1d */, 64 /* 6 */, MCK_ZPRExtendLSL6464, AMFBS_HasSVE },
35508 { 3673 /* prfd */, 16 /* 4 */, MCK_ZPRExtendLSL6464, AMFBS_HasSVE },
35511 { 3673 /* prfd */, 16 /* 4 */, MCK_ZPRExtendLSL6464, AMFBS_HasSVE },
37889 { 5243 /* st1d */, 16 /* 4 */, MCK_ZPRExtendLSL6464, AMFBS_HasSVE },
37892 { 5243 /* st1d */, 16 /* 4 */, MCK_ZPRExtendLSL6464, AMFBS_HasSVE },
37935 { 5243 /* st1d */, 16 /* 4 */, MCK_ZPRExtendLSL6464, AMFBS_HasSVE },
37938 { 5243 /* st1d */, 16 /* 4 */, MCK_ZPRExtendLSL6464, AMFBS_HasSVE },
40761 case MCK_ZPRExtendLSL6464: