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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc 9923 case MCK_UImm6s2: {
12095 case MCK_UImm6s2: return "MCK_UImm6s2";
15108 { 1890 /* ld1rh */, AArch64::LD1RH_IMM, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },
15109 { 1890 /* ld1rh */, AArch64::LD1RH_S_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },
15110 { 1890 /* ld1rh */, AArch64::LD1RH_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },
15111 { 1890 /* ld1rh */, AArch64::LD1RH_IMM, Convert__SVEVectorList1161_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorList116, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },
15112 { 1890 /* ld1rh */, AArch64::LD1RH_S_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },
15113 { 1890 /* ld1rh */, AArch64::LD1RH_D_IMM, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },
15154 { 1931 /* ld1rsh */, AArch64::LD1RSH_S_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },
15155 { 1931 /* ld1rsh */, AArch64::LD1RSH_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },
15156 { 1931 /* ld1rsh */, AArch64::LD1RSH_S_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },
15157 { 1931 /* ld1rsh */, AArch64::LD1RSH_D_IMM, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },
22466 { 1890 /* ld1rh */, AArch64::LD1RH_IMM, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },
22467 { 1890 /* ld1rh */, AArch64::LD1RH_S_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },
22468 { 1890 /* ld1rh */, AArch64::LD1RH_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },
22469 { 1890 /* ld1rh */, AArch64::LD1RH_IMM, Convert__SVEVectorList1161_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorList116, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },
22470 { 1890 /* ld1rh */, AArch64::LD1RH_S_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },
22471 { 1890 /* ld1rh */, AArch64::LD1RH_D_IMM, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },
22512 { 1931 /* ld1rsh */, AArch64::LD1RSH_S_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },
22513 { 1931 /* ld1rsh */, AArch64::LD1RSH_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },
22514 { 1931 /* ld1rsh */, AArch64::LD1RSH_S_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },
22515 { 1931 /* ld1rsh */, AArch64::LD1RSH_D_IMM, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s21_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s2, MCK__93_ }, },