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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc 9914 case MCK_UImm6s1: {
12094 case MCK_UImm6s1: return "MCK_UImm6s1";
15090 { 1878 /* ld1rb */, AArch64::LD1RB_H_IMM, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
15091 { 1878 /* ld1rb */, AArch64::LD1RB_S_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
15092 { 1878 /* ld1rb */, AArch64::LD1RB_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
15093 { 1878 /* ld1rb */, AArch64::LD1RB_IMM, Convert__SVEVectorBReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
15094 { 1878 /* ld1rb */, AArch64::LD1RB_IMM, Convert__SVEVectorList181_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorList18, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
15095 { 1878 /* ld1rb */, AArch64::LD1RB_H_IMM, Convert__SVEVectorList1161_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorList116, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
15096 { 1878 /* ld1rb */, AArch64::LD1RB_S_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
15097 { 1878 /* ld1rb */, AArch64::LD1RB_D_IMM, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
15144 { 1924 /* ld1rsb */, AArch64::LD1RSB_H_IMM, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
15145 { 1924 /* ld1rsb */, AArch64::LD1RSB_S_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
15146 { 1924 /* ld1rsb */, AArch64::LD1RSB_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
15147 { 1924 /* ld1rsb */, AArch64::LD1RSB_H_IMM, Convert__SVEVectorList1161_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorList116, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
15148 { 1924 /* ld1rsb */, AArch64::LD1RSB_S_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
15149 { 1924 /* ld1rsb */, AArch64::LD1RSB_D_IMM, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
22448 { 1878 /* ld1rb */, AArch64::LD1RB_H_IMM, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
22449 { 1878 /* ld1rb */, AArch64::LD1RB_S_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
22450 { 1878 /* ld1rb */, AArch64::LD1RB_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
22451 { 1878 /* ld1rb */, AArch64::LD1RB_IMM, Convert__SVEVectorBReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
22452 { 1878 /* ld1rb */, AArch64::LD1RB_IMM, Convert__SVEVectorList181_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorList18, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
22453 { 1878 /* ld1rb */, AArch64::LD1RB_H_IMM, Convert__SVEVectorList1161_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorList116, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
22454 { 1878 /* ld1rb */, AArch64::LD1RB_S_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
22455 { 1878 /* ld1rb */, AArch64::LD1RB_D_IMM, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
22502 { 1924 /* ld1rsb */, AArch64::LD1RSB_H_IMM, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
22503 { 1924 /* ld1rsb */, AArch64::LD1RSB_S_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
22504 { 1924 /* ld1rsb */, AArch64::LD1RSB_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
22505 { 1924 /* ld1rsb */, AArch64::LD1RSB_H_IMM, Convert__SVEVectorList1161_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorList116, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
22506 { 1924 /* ld1rsb */, AArch64::LD1RSB_S_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },
22507 { 1924 /* ld1rsb */, AArch64::LD1RSB_D_IMM, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__UImm6s11_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_UImm6s1, MCK__93_ }, },