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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc 9869 case MCK_UImm5s2: {
12089 case MCK_UImm5s2: return "MCK_UImm5s2";
15004 { 1868 /* ld1h */, AArch64::GLD1H_S_IMM_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
15012 { 1868 /* ld1h */, AArch64::GLD1H_D_IMM_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
15019 { 1868 /* ld1h */, AArch64::GLD1H_S_IMM_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
15027 { 1868 /* ld1h */, AArch64::GLD1H_D_IMM_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
15219 { 1957 /* ld1sh */, AArch64::GLD1SH_S_IMM_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
15227 { 1957 /* ld1sh */, AArch64::GLD1SH_D_IMM_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
15233 { 1957 /* ld1sh */, AArch64::GLD1SH_S_IMM_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
15241 { 1957 /* ld1sh */, AArch64::GLD1SH_D_IMM_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
15836 { 2464 /* ldff1h */, AArch64::GLDFF1H_S_IMM_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
15844 { 2464 /* ldff1h */, AArch64::GLDFF1H_D_IMM_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
15851 { 2464 /* ldff1h */, AArch64::GLDFF1H_S_IMM_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
15859 { 2464 /* ldff1h */, AArch64::GLDFF1H_D_IMM_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
15903 { 2479 /* ldff1sh */, AArch64::GLDFF1SH_S_IMM_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
15911 { 2479 /* ldff1sh */, AArch64::GLDFF1SH_D_IMM_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
15917 { 2479 /* ldff1sh */, AArch64::GLDFF1SH_S_IMM_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
15925 { 2479 /* ldff1sh */, AArch64::GLDFF1SH_D_IMM_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
16879 { 3678 /* prfh */, AArch64::PRFH_S_PZI, Convert__SVEPrefetch1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_3__UImm5s21_4, AMFBS_HasSVE, { MCK_SVEPrefetch, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
16880 { 3678 /* prfh */, AArch64::PRFH_D_PZI, Convert__SVEPrefetch1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_3__UImm5s21_4, AMFBS_HasSVE, { MCK_SVEPrefetch, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
18339 { 5248 /* st1h */, AArch64::SST1H_S_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_3__UImm5s21_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
18347 { 5248 /* st1h */, AArch64::SST1H_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_3__UImm5s21_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
18354 { 5248 /* st1h */, AArch64::SST1H_S_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_3__UImm5s21_4, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
18362 { 5248 /* st1h */, AArch64::SST1H_D_IMM, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_3__UImm5s21_4, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
22362 { 1868 /* ld1h */, AArch64::GLD1H_S_IMM_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
22370 { 1868 /* ld1h */, AArch64::GLD1H_D_IMM_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
22377 { 1868 /* ld1h */, AArch64::GLD1H_S_IMM_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
22385 { 1868 /* ld1h */, AArch64::GLD1H_D_IMM_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
22577 { 1957 /* ld1sh */, AArch64::GLD1SH_S_IMM_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
22585 { 1957 /* ld1sh */, AArch64::GLD1SH_D_IMM_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
22591 { 1957 /* ld1sh */, AArch64::GLD1SH_S_IMM_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
22599 { 1957 /* ld1sh */, AArch64::GLD1SH_D_IMM_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
23194 { 2464 /* ldff1h */, AArch64::GLDFF1H_S_IMM_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
23202 { 2464 /* ldff1h */, AArch64::GLDFF1H_D_IMM_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
23209 { 2464 /* ldff1h */, AArch64::GLDFF1H_S_IMM_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
23217 { 2464 /* ldff1h */, AArch64::GLDFF1H_D_IMM_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
23261 { 2479 /* ldff1sh */, AArch64::GLDFF1SH_S_IMM_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
23269 { 2479 /* ldff1sh */, AArch64::GLDFF1SH_D_IMM_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
23275 { 2479 /* ldff1sh */, AArch64::GLDFF1SH_S_IMM_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
23283 { 2479 /* ldff1sh */, AArch64::GLDFF1SH_D_IMM_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
24237 { 3678 /* prfh */, AArch64::PRFH_S_PZI, Convert__SVEPrefetch1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_3__UImm5s21_4, AMFBS_HasSVE, { MCK_SVEPrefetch, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
24238 { 3678 /* prfh */, AArch64::PRFH_D_PZI, Convert__SVEPrefetch1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_3__UImm5s21_4, AMFBS_HasSVE, { MCK_SVEPrefetch, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
25697 { 5248 /* st1h */, AArch64::SST1H_S_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_3__UImm5s21_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
25705 { 5248 /* st1h */, AArch64::SST1H_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_3__UImm5s21_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
25712 { 5248 /* st1h */, AArch64::SST1H_S_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_3__UImm5s21_4, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_SVEVectorSReg, MCK_UImm5s2, MCK__93_ }, },
25720 { 5248 /* st1h */, AArch64::SST1H_D_IMM, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_3__UImm5s21_4, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },