reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
10020 case MCK_TypedVectorList4_08: { 12108 case MCK_TypedVectorList4_08: return "MCK_TypedVectorList4_08"; 15588 { 2032 /* ld4 */, AArch64::LD4i8, Convert__TypedVectorList4_081_0__Tie0_1_1__IndexRange0_151_1__Reg1_3, AMFBS_HasNEON, { MCK_TypedVectorList4_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, 15610 { 2032 /* ld4 */, AArch64::LD4i8_POST, Convert__Reg1_3__TypedVectorList4_081_0__Tie1_1_1__IndexRange0_151_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_4 }, }, 15611 { 2032 /* ld4 */, AArch64::LD4i8_POST, Convert__Reg1_3__TypedVectorList4_081_0__Tie1_1_1__IndexRange0_151_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, 18597 { 5311 /* st4 */, AArch64::ST4i8, Convert__TypedVectorList4_081_0__IndexRange0_151_1__Reg1_3, AMFBS_HasNEON, { MCK_TypedVectorList4_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, 18619 { 5311 /* st4 */, AArch64::ST4i8_POST, Convert__Reg1_3__TypedVectorList4_081_0__IndexRange0_151_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_4 }, }, 18620 { 5311 /* st4 */, AArch64::ST4i8_POST, Convert__Reg1_3__TypedVectorList4_081_0__IndexRange0_151_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, 22946 { 2032 /* ld4 */, AArch64::LD4i8, Convert__TypedVectorList4_081_0__Tie0_1_1__IndexRange0_151_1__Reg1_3, AMFBS_HasNEON, { MCK_TypedVectorList4_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, 22968 { 2032 /* ld4 */, AArch64::LD4i8_POST, Convert__Reg1_3__TypedVectorList4_081_0__Tie1_1_1__IndexRange0_151_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_4 }, }, 22969 { 2032 /* ld4 */, AArch64::LD4i8_POST, Convert__Reg1_3__TypedVectorList4_081_0__Tie1_1_1__IndexRange0_151_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, 25955 { 5311 /* st4 */, AArch64::ST4i8, Convert__TypedVectorList4_081_0__IndexRange0_151_1__Reg1_3, AMFBS_HasNEON, { MCK_TypedVectorList4_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, 25977 { 5311 /* st4 */, AArch64::ST4i8_POST, Convert__Reg1_3__TypedVectorList4_081_0__IndexRange0_151_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_4 }, }, 25978 { 5311 /* st4 */, AArch64::ST4i8_POST, Convert__Reg1_3__TypedVectorList4_081_0__IndexRange0_151_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },