reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
10041 case MCK_TypedVectorList4_032: { 12111 case MCK_TypedVectorList4_032: return "MCK_TypedVectorList4_032"; 15591 { 2032 /* ld4 */, AArch64::LD4i32, Convert__TypedVectorList4_0321_0__Tie0_1_1__IndexRange0_31_1__Reg1_3, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, 15616 { 2032 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_3__TypedVectorList4_0321_0__Tie1_1_1__IndexRange0_31_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, }, 15617 { 2032 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_3__TypedVectorList4_0321_0__Tie1_1_1__IndexRange0_31_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, 18600 { 5311 /* st4 */, AArch64::ST4i32, Convert__TypedVectorList4_0321_0__IndexRange0_31_1__Reg1_3, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, 18625 { 5311 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_3__TypedVectorList4_0321_0__IndexRange0_31_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, }, 18626 { 5311 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_3__TypedVectorList4_0321_0__IndexRange0_31_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, 22949 { 2032 /* ld4 */, AArch64::LD4i32, Convert__TypedVectorList4_0321_0__Tie0_1_1__IndexRange0_31_1__Reg1_3, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, 22974 { 2032 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_3__TypedVectorList4_0321_0__Tie1_1_1__IndexRange0_31_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, }, 22975 { 2032 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_3__TypedVectorList4_0321_0__Tie1_1_1__IndexRange0_31_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, 25958 { 5311 /* st4 */, AArch64::ST4i32, Convert__TypedVectorList4_0321_0__IndexRange0_31_1__Reg1_3, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, 25983 { 5311 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_3__TypedVectorList4_0321_0__IndexRange0_31_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, }, 25984 { 5311 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_3__TypedVectorList4_0321_0__IndexRange0_31_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },