reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
10034 case MCK_TypedVectorList4_016: { 12110 case MCK_TypedVectorList4_016: return "MCK_TypedVectorList4_016"; 15590 { 2032 /* ld4 */, AArch64::LD4i16, Convert__TypedVectorList4_0161_0__Tie0_1_1__IndexRange0_71_1__Reg1_3, AMFBS_HasNEON, { MCK_TypedVectorList4_016, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, 15614 { 2032 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_3__TypedVectorList4_0161_0__Tie1_1_1__IndexRange0_71_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_016, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_8 }, }, 15615 { 2032 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_3__TypedVectorList4_0161_0__Tie1_1_1__IndexRange0_71_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_016, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, 18599 { 5311 /* st4 */, AArch64::ST4i16, Convert__TypedVectorList4_0161_0__IndexRange0_71_1__Reg1_3, AMFBS_HasNEON, { MCK_TypedVectorList4_016, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, 18623 { 5311 /* st4 */, AArch64::ST4i16_POST, Convert__Reg1_3__TypedVectorList4_0161_0__IndexRange0_71_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_016, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_8 }, }, 18624 { 5311 /* st4 */, AArch64::ST4i16_POST, Convert__Reg1_3__TypedVectorList4_0161_0__IndexRange0_71_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_016, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, 22948 { 2032 /* ld4 */, AArch64::LD4i16, Convert__TypedVectorList4_0161_0__Tie0_1_1__IndexRange0_71_1__Reg1_3, AMFBS_HasNEON, { MCK_TypedVectorList4_016, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, 22972 { 2032 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_3__TypedVectorList4_0161_0__Tie1_1_1__IndexRange0_71_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_016, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_8 }, }, 22973 { 2032 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_3__TypedVectorList4_0161_0__Tie1_1_1__IndexRange0_71_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_016, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, 25957 { 5311 /* st4 */, AArch64::ST4i16, Convert__TypedVectorList4_0161_0__IndexRange0_71_1__Reg1_3, AMFBS_HasNEON, { MCK_TypedVectorList4_016, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, 25981 { 5311 /* st4 */, AArch64::ST4i16_POST, Convert__Reg1_3__TypedVectorList4_0161_0__IndexRange0_71_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_016, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_8 }, }, 25982 { 5311 /* st4 */, AArch64::ST4i16_POST, Convert__Reg1_3__TypedVectorList4_0161_0__IndexRange0_71_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_016, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },