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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc10188 case MCK_TypedVectorList3_432: {
12132 case MCK_TypedVectorList3_432: return "MCK_TypedVectorList3_432";
14729 { 1854 /* ld1 */, AArch64::LD1Threev4s, Convert__TypedVectorList3_4321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
14818 { 1854 /* ld1 */, AArch64::LD1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
14819 { 1854 /* ld1 */, AArch64::LD1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15438 { 2003 /* ld3 */, AArch64::LD3Threev4s, Convert__TypedVectorList3_4321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15456 { 2003 /* ld3 */, AArch64::LD3Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
15457 { 2003 /* ld3 */, AArch64::LD3Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15514 { 2022 /* ld3r */, AArch64::LD3Rv4s, Convert__TypedVectorList3_4321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15535 { 2022 /* ld3r */, AArch64::LD3Rv4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_12 }, },
15536 { 2022 /* ld3r */, AArch64::LD3Rv4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
18064 { 5234 /* st1 */, AArch64::ST1Threev4s, Convert__TypedVectorList3_4321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
18153 { 5234 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
18154 { 5234 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
18495 { 5287 /* st3 */, AArch64::ST3Threev4s, Convert__TypedVectorList3_4321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
18513 { 5287 /* st3 */, AArch64::ST3Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
18514 { 5287 /* st3 */, AArch64::ST3Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22087 { 1854 /* ld1 */, AArch64::LD1Threev4s, Convert__TypedVectorList3_4321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22176 { 1854 /* ld1 */, AArch64::LD1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
22177 { 1854 /* ld1 */, AArch64::LD1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22796 { 2003 /* ld3 */, AArch64::LD3Threev4s, Convert__TypedVectorList3_4321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22814 { 2003 /* ld3 */, AArch64::LD3Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
22815 { 2003 /* ld3 */, AArch64::LD3Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22872 { 2022 /* ld3r */, AArch64::LD3Rv4s, Convert__TypedVectorList3_4321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22893 { 2022 /* ld3r */, AArch64::LD3Rv4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_12 }, },
22894 { 2022 /* ld3r */, AArch64::LD3Rv4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25422 { 5234 /* st1 */, AArch64::ST1Threev4s, Convert__TypedVectorList3_4321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
25511 { 5234 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
25512 { 5234 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25853 { 5287 /* st3 */, AArch64::ST3Threev4s, Convert__TypedVectorList3_4321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
25871 { 5287 /* st3 */, AArch64::ST3Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
25872 { 5287 /* st3 */, AArch64::ST3Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },