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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc10181 case MCK_TypedVectorList3_416: {
12131 case MCK_TypedVectorList3_416: return "MCK_TypedVectorList3_416";
14728 { 1854 /* ld1 */, AArch64::LD1Threev4h, Convert__TypedVectorList3_4161_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
14816 { 1854 /* ld1 */, AArch64::LD1Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
14817 { 1854 /* ld1 */, AArch64::LD1Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15437 { 2003 /* ld3 */, AArch64::LD3Threev4h, Convert__TypedVectorList3_4161_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15454 { 2003 /* ld3 */, AArch64::LD3Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
15455 { 2003 /* ld3 */, AArch64::LD3Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15513 { 2022 /* ld3r */, AArch64::LD3Rv4h, Convert__TypedVectorList3_4161_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15533 { 2022 /* ld3r */, AArch64::LD3Rv4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_6 }, },
15534 { 2022 /* ld3r */, AArch64::LD3Rv4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
18063 { 5234 /* st1 */, AArch64::ST1Threev4h, Convert__TypedVectorList3_4161_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
18151 { 5234 /* st1 */, AArch64::ST1Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
18152 { 5234 /* st1 */, AArch64::ST1Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
18494 { 5287 /* st3 */, AArch64::ST3Threev4h, Convert__TypedVectorList3_4161_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
18511 { 5287 /* st3 */, AArch64::ST3Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
18512 { 5287 /* st3 */, AArch64::ST3Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22086 { 1854 /* ld1 */, AArch64::LD1Threev4h, Convert__TypedVectorList3_4161_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22174 { 1854 /* ld1 */, AArch64::LD1Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
22175 { 1854 /* ld1 */, AArch64::LD1Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22795 { 2003 /* ld3 */, AArch64::LD3Threev4h, Convert__TypedVectorList3_4161_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22812 { 2003 /* ld3 */, AArch64::LD3Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
22813 { 2003 /* ld3 */, AArch64::LD3Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22871 { 2022 /* ld3r */, AArch64::LD3Rv4h, Convert__TypedVectorList3_4161_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22891 { 2022 /* ld3r */, AArch64::LD3Rv4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_6 }, },
22892 { 2022 /* ld3r */, AArch64::LD3Rv4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25421 { 5234 /* st1 */, AArch64::ST1Threev4h, Convert__TypedVectorList3_4161_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
25509 { 5234 /* st1 */, AArch64::ST1Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
25510 { 5234 /* st1 */, AArch64::ST1Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25852 { 5287 /* st3 */, AArch64::ST3Threev4h, Convert__TypedVectorList3_4161_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
25869 { 5287 /* st3 */, AArch64::ST3Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
25870 { 5287 /* st3 */, AArch64::ST3Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4161_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },