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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc10167 case MCK_TypedVectorList3_264: {
12129 case MCK_TypedVectorList3_264: return "MCK_TypedVectorList3_264";
14726 { 1854 /* ld1 */, AArch64::LD1Threev2d, Convert__TypedVectorList3_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
14812 { 1854 /* ld1 */, AArch64::LD1Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
14813 { 1854 /* ld1 */, AArch64::LD1Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15435 { 2003 /* ld3 */, AArch64::LD3Threev2d, Convert__TypedVectorList3_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15450 { 2003 /* ld3 */, AArch64::LD3Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
15451 { 2003 /* ld3 */, AArch64::LD3Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15511 { 2022 /* ld3r */, AArch64::LD3Rv2d, Convert__TypedVectorList3_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15529 { 2022 /* ld3r */, AArch64::LD3Rv2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
15530 { 2022 /* ld3r */, AArch64::LD3Rv2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
18061 { 5234 /* st1 */, AArch64::ST1Threev2d, Convert__TypedVectorList3_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
18147 { 5234 /* st1 */, AArch64::ST1Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
18148 { 5234 /* st1 */, AArch64::ST1Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
18492 { 5287 /* st3 */, AArch64::ST3Threev2d, Convert__TypedVectorList3_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
18507 { 5287 /* st3 */, AArch64::ST3Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
18508 { 5287 /* st3 */, AArch64::ST3Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22084 { 1854 /* ld1 */, AArch64::LD1Threev2d, Convert__TypedVectorList3_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22170 { 1854 /* ld1 */, AArch64::LD1Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
22171 { 1854 /* ld1 */, AArch64::LD1Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22793 { 2003 /* ld3 */, AArch64::LD3Threev2d, Convert__TypedVectorList3_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22808 { 2003 /* ld3 */, AArch64::LD3Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
22809 { 2003 /* ld3 */, AArch64::LD3Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22869 { 2022 /* ld3r */, AArch64::LD3Rv2d, Convert__TypedVectorList3_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22887 { 2022 /* ld3r */, AArch64::LD3Rv2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
22888 { 2022 /* ld3r */, AArch64::LD3Rv2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25419 { 5234 /* st1 */, AArch64::ST1Threev2d, Convert__TypedVectorList3_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
25505 { 5234 /* st1 */, AArch64::ST1Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
25506 { 5234 /* st1 */, AArch64::ST1Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25850 { 5287 /* st3 */, AArch64::ST3Threev2d, Convert__TypedVectorList3_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
25865 { 5287 /* st3 */, AArch64::ST3Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
25866 { 5287 /* st3 */, AArch64::ST3Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },