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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc10174 case MCK_TypedVectorList3_232: {
12130 case MCK_TypedVectorList3_232: return "MCK_TypedVectorList3_232";
14727 { 1854 /* ld1 */, AArch64::LD1Threev2s, Convert__TypedVectorList3_2321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
14814 { 1854 /* ld1 */, AArch64::LD1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
14815 { 1854 /* ld1 */, AArch64::LD1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15436 { 2003 /* ld3 */, AArch64::LD3Threev2s, Convert__TypedVectorList3_2321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15452 { 2003 /* ld3 */, AArch64::LD3Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
15453 { 2003 /* ld3 */, AArch64::LD3Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15512 { 2022 /* ld3r */, AArch64::LD3Rv2s, Convert__TypedVectorList3_2321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15531 { 2022 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_12 }, },
15532 { 2022 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
18062 { 5234 /* st1 */, AArch64::ST1Threev2s, Convert__TypedVectorList3_2321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
18149 { 5234 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
18150 { 5234 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
18493 { 5287 /* st3 */, AArch64::ST3Threev2s, Convert__TypedVectorList3_2321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
18509 { 5287 /* st3 */, AArch64::ST3Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
18510 { 5287 /* st3 */, AArch64::ST3Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22085 { 1854 /* ld1 */, AArch64::LD1Threev2s, Convert__TypedVectorList3_2321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22172 { 1854 /* ld1 */, AArch64::LD1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
22173 { 1854 /* ld1 */, AArch64::LD1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22794 { 2003 /* ld3 */, AArch64::LD3Threev2s, Convert__TypedVectorList3_2321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22810 { 2003 /* ld3 */, AArch64::LD3Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
22811 { 2003 /* ld3 */, AArch64::LD3Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22870 { 2022 /* ld3r */, AArch64::LD3Rv2s, Convert__TypedVectorList3_2321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22889 { 2022 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_12 }, },
22890 { 2022 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25420 { 5234 /* st1 */, AArch64::ST1Threev2s, Convert__TypedVectorList3_2321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
25507 { 5234 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
25508 { 5234 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25851 { 5287 /* st3 */, AArch64::ST3Threev2s, Convert__TypedVectorList3_2321_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
25867 { 5287 /* st3 */, AArch64::ST3Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
25868 { 5287 /* st3 */, AArch64::ST3Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },