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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc10265 case MCK_TypedVectorList2_264: {
12143 case MCK_TypedVectorList2_264: return "MCK_TypedVectorList2_264";
14734 { 1854 /* ld1 */, AArch64::LD1Twov2d, Convert__TypedVectorList2_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
14828 { 1854 /* ld1 */, AArch64::LD1Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
14829 { 1854 /* ld1 */, AArch64::LD1Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15309 { 1974 /* ld2 */, AArch64::LD2Twov2d, Convert__TypedVectorList2_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15324 { 1974 /* ld2 */, AArch64::LD2Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
15325 { 1974 /* ld2 */, AArch64::LD2Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15385 { 1993 /* ld2r */, AArch64::LD2Rv2d, Convert__TypedVectorList2_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15403 { 1993 /* ld2r */, AArch64::LD2Rv2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
15404 { 1993 /* ld2r */, AArch64::LD2Rv2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
18069 { 5234 /* st1 */, AArch64::ST1Twov2d, Convert__TypedVectorList2_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
18163 { 5234 /* st1 */, AArch64::ST1Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
18164 { 5234 /* st1 */, AArch64::ST1Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
18410 { 5258 /* st2 */, AArch64::ST2Twov2d, Convert__TypedVectorList2_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
18425 { 5258 /* st2 */, AArch64::ST2Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
18426 { 5258 /* st2 */, AArch64::ST2Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22092 { 1854 /* ld1 */, AArch64::LD1Twov2d, Convert__TypedVectorList2_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22186 { 1854 /* ld1 */, AArch64::LD1Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
22187 { 1854 /* ld1 */, AArch64::LD1Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22667 { 1974 /* ld2 */, AArch64::LD2Twov2d, Convert__TypedVectorList2_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22682 { 1974 /* ld2 */, AArch64::LD2Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
22683 { 1974 /* ld2 */, AArch64::LD2Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22743 { 1993 /* ld2r */, AArch64::LD2Rv2d, Convert__TypedVectorList2_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22761 { 1993 /* ld2r */, AArch64::LD2Rv2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
22762 { 1993 /* ld2r */, AArch64::LD2Rv2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25427 { 5234 /* st1 */, AArch64::ST1Twov2d, Convert__TypedVectorList2_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
25521 { 5234 /* st1 */, AArch64::ST1Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
25522 { 5234 /* st1 */, AArch64::ST1Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25768 { 5258 /* st2 */, AArch64::ST2Twov2d, Convert__TypedVectorList2_2641_0__Reg1_2, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
25783 { 5258 /* st2 */, AArch64::ST2Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
25784 { 5258 /* st2 */, AArch64::ST2Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_264, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },