reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
10314   case MCK_TypedVectorList2_08: {
12150   case MCK_TypedVectorList2_08: return "MCK_TypedVectorList2_08";
15336   { 1974 /* ld2 */, AArch64::LD2i8, Convert__TypedVectorList2_081_0__Tie0_1_1__IndexRange0_151_1__Reg1_3, AMFBS_HasNEON, { MCK_TypedVectorList2_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15358   { 1974 /* ld2 */, AArch64::LD2i8_POST, Convert__Reg1_3__TypedVectorList2_081_0__Tie1_1_1__IndexRange0_151_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_2 }, },
15359   { 1974 /* ld2 */, AArch64::LD2i8_POST, Convert__Reg1_3__TypedVectorList2_081_0__Tie1_1_1__IndexRange0_151_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList2_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
18437   { 5258 /* st2 */, AArch64::ST2i8, Convert__TypedVectorList2_081_0__IndexRange0_151_1__Reg1_3, AMFBS_HasNEON, { MCK_TypedVectorList2_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
18459   { 5258 /* st2 */, AArch64::ST2i8_POST, Convert__Reg1_3__TypedVectorList2_081_0__IndexRange0_151_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_2 }, },
18460   { 5258 /* st2 */, AArch64::ST2i8_POST, Convert__Reg1_3__TypedVectorList2_081_0__IndexRange0_151_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList2_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22694   { 1974 /* ld2 */, AArch64::LD2i8, Convert__TypedVectorList2_081_0__Tie0_1_1__IndexRange0_151_1__Reg1_3, AMFBS_HasNEON, { MCK_TypedVectorList2_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22716   { 1974 /* ld2 */, AArch64::LD2i8_POST, Convert__Reg1_3__TypedVectorList2_081_0__Tie1_1_1__IndexRange0_151_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_2 }, },
22717   { 1974 /* ld2 */, AArch64::LD2i8_POST, Convert__Reg1_3__TypedVectorList2_081_0__Tie1_1_1__IndexRange0_151_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList2_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25795   { 5258 /* st2 */, AArch64::ST2i8, Convert__TypedVectorList2_081_0__IndexRange0_151_1__Reg1_3, AMFBS_HasNEON, { MCK_TypedVectorList2_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
25817   { 5258 /* st2 */, AArch64::ST2i8_POST, Convert__Reg1_3__TypedVectorList2_081_0__IndexRange0_151_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_2 }, },
25818   { 5258 /* st2 */, AArch64::ST2i8_POST, Convert__Reg1_3__TypedVectorList2_081_0__IndexRange0_151_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList2_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },