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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc10950 case MCK_SVEVectorList432: {
12228 case MCK_SVEVectorList432: return "MCK_SVEVectorList432";
15683 { 2056 /* ld4w */, AArch64::LD4W_IMM, Convert__SVEVectorList4321_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList432, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15684 { 2056 /* ld4w */, AArch64::LD4W, Convert__SVEVectorList4321_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64NoXZRshifted321_6, AMFBS_HasSVE, { MCK_SVEVectorList432, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64NoXZRshifted32, MCK__93_ }, },
15685 { 2056 /* ld4w */, AArch64::LD4W_IMM, Convert__SVEVectorList4321_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s41_6, AMFBS_HasSVE, { MCK_SVEVectorList432, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s4, MCK_mul, MCK_vl, MCK__93_ }, },
18644 { 5330 /* st4w */, AArch64::ST4W_IMM, Convert__SVEVectorList4321_0__SVEPredicate3bAnyReg1_1__Reg1_3__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList432, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
18645 { 5330 /* st4w */, AArch64::ST4W, Convert__SVEVectorList4321_0__SVEPredicate3bAnyReg1_1__Reg1_3__GPR64NoXZRshifted321_4, AMFBS_HasSVE, { MCK_SVEVectorList432, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_GPR64NoXZRshifted32, MCK__93_ }, },
18646 { 5330 /* st4w */, AArch64::ST4W_IMM, Convert__SVEVectorList4321_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s41_4, AMFBS_HasSVE, { MCK_SVEVectorList432, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s4, MCK_mul, MCK_vl, MCK__93_ }, },
23041 { 2056 /* ld4w */, AArch64::LD4W_IMM, Convert__SVEVectorList4321_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList432, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
23042 { 2056 /* ld4w */, AArch64::LD4W, Convert__SVEVectorList4321_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64NoXZRshifted321_6, AMFBS_HasSVE, { MCK_SVEVectorList432, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64NoXZRshifted32, MCK__93_ }, },
23043 { 2056 /* ld4w */, AArch64::LD4W_IMM, Convert__SVEVectorList4321_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s41_6, AMFBS_HasSVE, { MCK_SVEVectorList432, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s4, MCK_mul, MCK_vl, MCK__93_ }, },
26002 { 5330 /* st4w */, AArch64::ST4W_IMM, Convert__SVEVectorList4321_0__SVEPredicate3bAnyReg1_1__Reg1_3__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList432, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
26003 { 5330 /* st4w */, AArch64::ST4W, Convert__SVEVectorList4321_0__SVEPredicate3bAnyReg1_1__Reg1_3__GPR64NoXZRshifted321_4, AMFBS_HasSVE, { MCK_SVEVectorList432, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_GPR64NoXZRshifted32, MCK__93_ }, },
26004 { 5330 /* st4w */, AArch64::ST4W_IMM, Convert__SVEVectorList4321_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s41_4, AMFBS_HasSVE, { MCK_SVEVectorList432, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s4, MCK_mul, MCK_vl, MCK__93_ }, },
32831 { 2056 /* ld4w */, 1 /* 0 */, MCK_SVEVectorList432, AMFBS_HasSVE },
32833 { 2056 /* ld4w */, 1 /* 0 */, MCK_SVEVectorList432, AMFBS_HasSVE },
32836 { 2056 /* ld4w */, 1 /* 0 */, MCK_SVEVectorList432, AMFBS_HasSVE },
32839 { 2056 /* ld4w */, 1 /* 0 */, MCK_SVEVectorList432, AMFBS_HasSVE },
32841 { 2056 /* ld4w */, 1 /* 0 */, MCK_SVEVectorList432, AMFBS_HasSVE },
32843 { 2056 /* ld4w */, 1 /* 0 */, MCK_SVEVectorList432, AMFBS_HasSVE },
38599 { 5330 /* st4w */, 1 /* 0 */, MCK_SVEVectorList432, AMFBS_HasSVE },
38601 { 5330 /* st4w */, 1 /* 0 */, MCK_SVEVectorList432, AMFBS_HasSVE },
38604 { 5330 /* st4w */, 1 /* 0 */, MCK_SVEVectorList432, AMFBS_HasSVE },
38607 { 5330 /* st4w */, 1 /* 0 */, MCK_SVEVectorList432, AMFBS_HasSVE },
38609 { 5330 /* st4w */, 1 /* 0 */, MCK_SVEVectorList432, AMFBS_HasSVE },
38611 { 5330 /* st4w */, 1 /* 0 */, MCK_SVEVectorList432, AMFBS_HasSVE },
40837 case MCK_SVEVectorList432: